]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
riscv: dts: spacemit: k3: Add USB2.0 support
authorYixun Lan <dlan@kernel.org>
Mon, 30 Mar 2026 22:15:21 +0000 (22:15 +0000)
committerYixun Lan <dlan@kernel.org>
Wed, 13 May 2026 02:29:49 +0000 (02:29 +0000)
There is one USB2.0 host in K3 SoC which use DWC3 IP but only provide
USB2.0 functionality, and with only one USB2 PHY connected.

The USB2.0 controller on Pico-ITX board connects to a Terminus FE1.1 Hub
which fully USB2.0 protocol compliant and provides 4 ports.

Link: https://patch.msgid.link/20260330-02-k3-usb20-dts-v2-1-46af262fb4a9@kernel.org
Signed-off-by: Yixun Lan <dlan@kernel.org>
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
arch/riscv/boot/dts/spacemit/k3.dtsi

index 4486dc1fe114da95452abbac9df61790059d6e67..b89c1521e6649b82530fb141cbf319fec0d9ba34 100644 (file)
                reg = <0x1 0x00000000 0x4 0x00000000>;
        };
 
+       reg_aux_vcc3v3: regulator-aux-vcc3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "AUX_VCC3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
        reg_aux_vcc5v: regulator-aux-vcc5v {
                compatible = "regulator-fixed";
                regulator-name = "AUX_VCC5V";
        pinctrl-0 = <&uart0_0_cfg>;
        status = "okay";
 };
+
+&usb2_host {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       hub@1 {
+               compatible = "usb1a40,0101";
+               reg = <1>;
+               vdd-supply = <&reg_aux_vcc3v3>;
+       };
+};
+
+&usb2_phy {
+       status = "okay";
+};
index e6faf8d8759e1f773ee17fa097166e62e6c7b363..23cca70f796be2e1a1dc3265c280d841c8424f70 100644 (file)
                dma-noncoherent;
                ranges;
 
+               usb2_host: usb@c0a00000 {
+                       compatible = "spacemit,k3-dwc3";
+                       reg = <0x0 0xc0a00000 0x0 0x10000>;
+                       clocks = <&syscon_apmu CLK_APMU_USB2_BUS>;
+                       clock-names = "usbdrd30";
+                       resets = <&syscon_apmu RESET_APMU_USB2_AHB>,
+                                <&syscon_apmu RESET_APMU_USB2_VCC>,
+                                <&syscon_apmu RESET_APMU_USB2_PHY>;
+                       reset-names = "ahb", "vcc", "phy";
+                       interrupts = <105 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-parent = <&saplic>;
+                       phys = <&usb2_phy>;
+                       phy-names = "usb2-phy";
+                       phy_type = "utmi";
+                       snps,dis_enblslpm_quirk;
+                       snps,dis_u2_susphy_quirk;
+                       snps,dis-del-phy-power-chg-quirk;
+                       snps,dis-tx-ipgap-linecheck-quirk;
+                       dr_mode = "host";
+                       maximum-speed = "high-speed";
+                       status = "disabled";
+               };
+
+               usb2_phy: phy@c0a20000 {
+                       compatible = "spacemit,k3-usb2-phy";
+                       reg = <0x0 0xc0a20000 0x0 0x200>;
+                       clocks = <&syscon_apmu CLK_APMU_USB2_BUS>;
+                       #phy-cells = <0>;
+                       status = "disabled";
+               };
+
                eth0: ethernet@cac80000 {
                        compatible = "spacemit,k3-dwmac", "snps,dwmac-5.40a";
                        reg = <0x0 0xcac80000 0x0 0x2000>;