static struct dw_mci_board pci_board_data = {
.caps = DW_MCI_CAPABILITIES,
.bus_hz = 33 * 1000 * 1000,
- .detect_delay_ms = 200,
};
static int dw_mci_pci_probe(struct pci_dev *pdev,
host->irq_flags = IRQF_SHARED;
host->pdata = &pci_board_data;
host->fifo_depth = 32;
+ host->detect_delay_ms = 200;
ret = pcim_iomap_regions(pdev, 1 << PCI_BAR_NO, pci_name(pdev));
if (ret)
static void dw_mci_handle_cd(struct dw_mci *host)
{
mmc_detect_change(host->mmc,
- msecs_to_jiffies(host->pdata->detect_delay_ms));
+ msecs_to_jiffies(host->detect_delay_ms));
}
static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
"fifo-depth property not found, using value of FIFOTH register as default\n");
device_property_read_u32(dev, "card-detect-delay",
- &pdata->detect_delay_ms);
+ &host->detect_delay_ms);
device_property_read_u32(dev, "data-addr", &host->data_addr_override);
* @clk_old: The last clock value that was requested from core.
* @pdev: platform_device registered
* @rstc: Reset controller for this host.
+ * @detect_delay_ms: Delay in mS before detecting cards after interrupt.
*
* Locking
* =======
unsigned int clk_old;
struct platform_device *pdev;
struct reset_control *rstc;
+ u32 detect_delay_ms;
};
/* DMA ops for Internal/External DMAC interface */
unsigned int bus_hz; /* Clock speed at the cclk_in pad */
u32 caps; /* Capabilities */
-
- /* delay in mS before detecting cards after interrupt */
- u32 detect_delay_ms;
};
/* Support for longer data read timeout */