The TPS65214 PMIC variant has a LOCK_REG register that prevents writes to
nearly all registers when locked. Unlock the registers at probe time and
leave them unlocked permanently.
This approach is justified because:
- Register locking is very uncommon in typical system operation
- No code path is expected to lock the registers during runtime
- Adding a custom regmap write function would add overhead to every
register write, including voltage changes triggered by CPU OPP
transitions from the cpufreq governor which could happen quite
frequently
Cc: stable@vger.kernel.org
Fixes: 7947219ab1a2d ("mfd: tps65219: Add support for TI TPS65214 PMIC")
Reviewed-by: Andrew Davis <afd@ti.com>
Signed-off-by: Kory Maincent (TI.com) <kory.maincent@bootlin.com>
Link: https://patch.msgid.link/20251218-fix_tps65219-v5-1-8bb511417f3a@bootlin.com
Signed-off-by: Lee Jones <lee@kernel.org>
return ret;
}
+ if (chip_id == TPS65214) {
+ ret = i2c_smbus_write_byte_data(client, TPS65214_REG_LOCK,
+ TPS65214_LOCK_ACCESS_CMD);
+ if (ret) {
+ dev_err(tps->dev, "Failed to unlock registers %d\n", ret);
+ return ret;
+ }
+ }
+
ret = devm_regmap_add_irq_chip(tps->dev, tps->regmap, client->irq,
IRQF_ONESHOT, 0, pmic->irq_chip,
&tps->irq_data);
#define TPS65215_ENABLE_LDO2_EN_MASK BIT(5)
#define TPS65214_ENABLE_LDO1_EN_MASK BIT(5)
#define TPS65219_ENABLE_LDO4_EN_MASK BIT(6)
+/* Register Unlock */
+#define TPS65214_LOCK_ACCESS_CMD 0x5a
/* power ON-OFF sequence slot */
#define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK GENMASK(3, 0)
#define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK GENMASK(7, 4)