};
&dwc3_1 {
- /delete-property/ phy-names ;
- /delete-property/ phys ;
+ /delete-property/ phy-names;
+ /delete-property/ phys;
dr_mode = "host";
maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk ;
- snps,dis_u3_susphy_quirk ;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
status = "okay";
};
};
ina226-vcc-1v2-ddr4 {
compatible = "iio-hwmon";
- io-channels = <&vcc_1v2_ddr4 0>, <&vcc_1v2_ddr4 1>, <&vcc_1v2_ddr4 2>, <&vcc_1v2_ddr4 3>;
+ io-channels = <&vcc_1v2_ddr4 0>, <&vcc_1v2_ddr4 1>, <&vcc_1v2_ddr4 2>,
+ <&vcc_1v2_ddr4 3>;
};
ina226-vcc-1v1-lp4 {
compatible = "iio-hwmon";
clock-output-names = "si570_user1";
silabs,skip-recall;
};
-
};
i2c@7 { /* USER_SI570_2 */
#address-cells = <1>;
phy0: ethernet-phy@0 { /* marwell m88e1512 */
reg = <0>;
reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
-/* xlnx,phy-type = <PHY_TYPE_SGMII>; */
+ /* xlnx,phy-type = <PHY_TYPE_SGMII>; */
};
};
};
};
ina226-vdd1-1v8-lp4 {
compatible = "iio-hwmon";
- io-channels = <&vdd1_1v8_lp4 0>, <&vdd1_1v8_lp4 1>, <&vdd1_1v8_lp4 2>, <&vdd1_1v8_lp4 3>;
+ io-channels = <&vdd1_1v8_lp4 0>, <&vdd1_1v8_lp4 1>, <&vdd1_1v8_lp4 2>,
+ <&vdd1_1v8_lp4 3>;
};
ina226-vcc0v6-lp4 {
compatible = "iio-hwmon";
reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>;
phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */
reg = <0>;
-/* xlnx,phy-type = <PHY_TYPE_SGMII>; */
+ /* xlnx,phy-type = <PHY_TYPE_SGMII>; */
};
};
};
};
&dwc3_1 {
- /delete-property/ phy-names ;
- /delete-property/ phys ;
+ /delete-property/ phy-names;
+ /delete-property/ phys;
maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk ;
- snps,dis_u3_susphy_quirk ;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
status = "disabled";
};
};
ina226-vdd1-1v8-lp4 {
compatible = "iio-hwmon";
- io-channels = <&vdd1_1v8_lp4 0>, <&vdd1_1v8_lp4 1>, <&vdd1_1v8_lp4 2>, <&vdd1_1v8_lp4 3>;
+ io-channels = <&vdd1_1v8_lp4 0>, <&vdd1_1v8_lp4 1>, <&vdd1_1v8_lp4 2>,
+ <&vdd1_1v8_lp4 3>;
};
};
};
&dwc3_1 {
- /delete-property/ phy-names ;
- /delete-property/ phys ;
+ /delete-property/ phy-names;
+ /delete-property/ phys;
maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk ;
- snps,dis_u3_susphy_quirk ;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
status = "disabled";
};
};
ina226-vdd1-1v8-lp4 {
compatible = "iio-hwmon";
- io-channels = <&vdd1_1v8_lp4 0>, <&vdd1_1v8_lp4 1>, <&vdd1_1v8_lp4 2>, <&vdd1_1v8_lp4 3>;
+ io-channels = <&vdd1_1v8_lp4 0>, <&vdd1_1v8_lp4 1>, <&vdd1_1v8_lp4 2>,
+ <&vdd1_1v8_lp4 3>;
};
};
};
&dwc3_1 {
- /delete-property/ phy-names ;
- /delete-property/ phys ;
+ /delete-property/ phy-names;
+ /delete-property/ phys;
maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk ;
- snps,dis_u3_susphy_quirk ;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
status = "disabled";
};
};
&dwc3_1 {
- /delete-property/ phy-names ;
- /delete-property/ phys ;
+ /delete-property/ phy-names;
+ /delete-property/ phys;
dr_mode = "host";
maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk ;
- snps,dis_u3_susphy_quirk ;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
status = "okay";
};
};
partition@140000 {
label = "Open_1";
- reg = <0x140000 0xC0000>; /* 768KB */
+ reg = <0x140000 0xc0000>; /* 768KB */
};
partition@200000 {
label = "Image A (FSBL, PMU, ATF, U-Boot)";
- reg = <0x200000 0xD00000>; /* 13MB */
+ reg = <0x200000 0xd00000>; /* 13MB */
};
partition@f00000 {
label = "ImgSel Image A Catch";
- reg = <0xF00000 0x80000>; /* 512KB */
+ reg = <0xf00000 0x80000>; /* 512KB */
read-only;
lock;
};
partition@f80000 {
label = "Image B (FSBL, PMU, ATF, U-Boot)";
- reg = <0xF80000 0xD00000>; /* 13MB */
+ reg = <0xf80000 0xd00000>; /* 13MB */
};
partition@1c80000 {
label = "ImgSel Image B Catch";
- reg = <0x1C80000 0x80000>; /* 512KB */
+ reg = <0x1c80000 0x80000>; /* 512KB */
read-only;
lock;
};
partition@1d00000 {
label = "Open_2";
- reg = <0x1D00000 0x100000>; /* 1MB */
+ reg = <0x1d00000 0x100000>; /* 1MB */
};
partition@1e00000 {
label = "Recovery Image";
- reg = <0x1E00000 0x200000>; /* 2MB */
+ reg = <0x1e00000 0x200000>; /* 2MB */
read-only;
lock;
};
label = "Secure OS Storage";
reg = <0x2280000 0x20000>; /* 128KB */
};
- partition@22A0000 {
+ partition@22a0000 {
label = "User";
- reg = <0x22A0000 0x1d60000>; /* 29.375 MB */
+ reg = <0x22a0000 0x1d60000>; /* 29.375 MB */
};
};
};
conf-tx {
pins = "MIO38", "MIO39", "MIO40",
- "MIO41", "MIO42", "MIO43";
+ "MIO41", "MIO42", "MIO43";
bias-disable;
low-power-enable;
};
clock-frequency = <100000000>;
clock-output-names = "fmc_si570";
};
-
};
/* 7 unused */
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@3 { /* for testing purpose */
label = "nand-rootfs";
- reg = <0x0 0x1C00000 0x1400000>;
+ reg = <0x0 0x1c00000 0x1400000>;
};
partition@4 { /* for testing purpose */
label = "nand-bitstream";
};
partition@5 { /* for testing purpose */
label = "nand-misc";
- reg = <0x0 0x3400000 0xFCC00000>;
+ reg = <0x0 0x3400000 0xfcc00000>;
};
};
nand@1 {
};
partition@3 { /* for testing purpose */
label = "nand1-rootfs";
- reg = <0x0 0x1C00000 0x1400000>;
+ reg = <0x0 0x1c00000 0x1400000>;
};
partition@4 { /* for testing purpose */
label = "nand1-bitstream";
};
partition@5 { /* for testing purpose */
label = "nand1-misc";
- reg = <0x0 0x3400000 0xFCC00000>;
+ reg = <0x0 0x3400000 0xfcc00000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
+ reg = <0x620000 0x5e0000>;
};
};
};
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
-
};
&dcc {
&i2c0 {
status = "okay";
clock-frequency = <400000>;
-
};
&gem1 {
};
ina226-vccint-io-bram {
compatible = "iio-hwmon";
- io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>;
+ io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>,
+ <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>;
};
ina226-vcc1v8 {
compatible = "iio-hwmon";
};
ina226-dac-avccaux {
compatible = "iio-hwmon";
- io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>, <&dac_avccaux 3>;
+ io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>,
+ <&dac_avccaux 3>;
};
ina226-adc-avcc {
compatible = "iio-hwmon";
};
ina226-adc-avccaux {
compatible = "iio-hwmon";
- io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>, <&adc_avccaux 3>;
+ io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>,
+ <&adc_avccaux 3>;
};
ina226-dac-avcc {
compatible = "iio-hwmon";
reg = <0x45>; /* i2c addr 0x15 */
};
/* J21 header too */
-
};
i2c@3 {
#address-cells = <1>;
status = "okay";
/* SATA OOB timing settings */
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
- ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
- ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
- ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+ ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0e>;
+ ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4a 0x06>;
+ ceva,p0-retry-params = /bits/ 16 <0x96a4 0x3ffc>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
- ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
- ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
- ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+ ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0e>;
+ ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4a 0x06>;
+ ceva,p1-retry-params = /bits/ 16 <0x96a4 0x3ffc>;
phy-names = "sata-phy";
phys = <&psgtr 3 PHY_TYPE_SATA 1 3>;
};
};
ina226-vccint-io-bram {
compatible = "iio-hwmon";
- io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>;
+ io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>,
+ <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>;
};
ina226-vcc1v8 {
compatible = "iio-hwmon";
};
ina226-dac-avccaux {
compatible = "iio-hwmon";
- io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>, <&dac_avccaux 3>;
+ io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>,
+ <&dac_avccaux 3>;
};
ina226-adc-avcc {
compatible = "iio-hwmon";
};
ina226-adc-avccaux {
compatible = "iio-hwmon";
- io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>, <&adc_avccaux 3>;
+ io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>,
+ <&adc_avccaux 3>;
};
ina226-dac-avcc {
compatible = "iio-hwmon";
reg = <0x45>; /* i2c addr 0x15 */
};
/* J21 header too */
-
};
i2c@3 {
#address-cells = <1>;
status = "okay";
/* SATA OOB timing settings */
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
- ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
- ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
- ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+ ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0e>;
+ ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4a 0x06>;
+ ceva,p0-retry-params = /bits/ 16 <0x96a4 0x3ffc>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
- ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
- ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
- ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+ ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0e>;
+ ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4a 0x06>;
+ ceva,p1-retry-params = /bits/ 16 <0x96a4 0x3ffc>;
phy-names = "sata-phy";
phys = <&psgtr 3 PHY_TYPE_SATA 1 3>;
};
};
ina226-vccint-io-bram {
compatible = "iio-hwmon";
- io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>;
+ io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>,
+ <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>;
};
ina226-vcc1v8 {
compatible = "iio-hwmon";
};
ina226-dac-avccaux {
compatible = "iio-hwmon";
- io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>, <&dac_avccaux 3>;
+ io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>,
+ <&dac_avccaux 3>;
};
ina226-adc-avcc {
compatible = "iio-hwmon";
};
ina226-adc-avccaux {
compatible = "iio-hwmon";
- io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>, <&adc_avccaux 3>;
+ io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>,
+ <&adc_avccaux 3>;
};
ina226-dac-avcc {
compatible = "iio-hwmon";
reg = <0x45>; /* i2c addr 0x15 */
};
/* J21 header too */
-
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* SI5381 - u43 */
- /* si5381: clock-generator@68 {
- reg = <0x68>;
- };*/
+ /*
+ * si5381: clock-generator@68 {
+ * reg = <0x68>;
+ * };
+ */
};
i2c_si570_user_c0: i2c@2 {
#address-cells = <1>;
};
ina226-vccint-io-bram {
compatible = "iio-hwmon";
- io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>;
+ io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>,
+ <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>;
};
ina226-vcc1v8 {
compatible = "iio-hwmon";
};
ina226-dac-avccaux {
compatible = "iio-hwmon";
- io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>, <&dac_avccaux 3>;
+ io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>,
+ <&dac_avccaux 3>;
};
ina226-adc-avcc {
compatible = "iio-hwmon";
};
ina226-adc-avccaux {
compatible = "iio-hwmon";
- io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>, <&adc_avccaux 3>;
+ io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>,
+ <&adc_avccaux 3>;
};
ina226-dac-avcc {
compatible = "iio-hwmon";
reg = <0x45>; /* i2c addr 0x15 */
};
/* J21 header too */
-
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* SI5381 - u43 */
- /* si5381: clock-generator@68 {
- reg = <0x68>;
- };*/
+ /*
+ * si5381: clock-generator@68 {
+ * reg = <0x68>;
+ * };
+ */
};
i2c_si570_user_c0: i2c@2 {
#address-cells = <1>;