mach-k3: am62a: add support for speed grades

Speed grades indicate the maximum operating frequency of any core on the
SoC. This patch adds support for the same to AM62a, this allows the A53
core to be started with the correct frequency by the R5 SPL.

Reference:
  Device Speed Grades (Table 6-1) in AM62a7 Datasheet
  https://www.ti.com/lit/ds/symlink/am62a7.pdf (Page#82)

Signed-off-by: Anshul Dalal <anshuld@ti.com>

diff --git a/arch/arm/mach-k3/am62ax/am62a7_init.c b/arch/arm/mach-k3/am62ax/am62a7_init.c
index 48d578e7d6f180f06b42003313bf643c725eae7e..cf81ca62f5b59912034290979a406c0bc02eca46 100644 (file)
--- a/arch/arm/mach-k3/am62ax/am62a7_init.c
+++ b/arch/arm/mach-k3/am62ax/am62a7_init.c
@@ -22,6 +22,44 @@ struct fwl_data cbass_main_fwls[] = {
        { "FSS_DAT_REG3", 7, 8 },
 };
 
+const struct k3_speed_grade_map am62a_map[] = {
+       {'M', 800000000},
+       {'N', 800000000},
+       {'O', 1000000000},
+       {'P', 1000000000},
+       {'Q', 1000000000},
+       {'R', 1000000000},
+       {'S', 1250000000},
+       {'T', 1250000000},
+       {'U', 1250000000},
+       {'V', 1250000000},
+       {/* List Terminator */ },
+};
+
+char k3_get_speed_grade(void)
+{
+       u32 efuse_val = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+       u32 efuse_speed = (efuse_val & JTAG_DEV_SPEED_MASK) >>
+                         JTAG_DEV_SPEED_SHIFT;
+
+       char speed_grade = ('A' - 1) + efuse_speed;
+
+       /* Speed grades for AM62a are not sequential */
+       switch (efuse_speed) {
+       case 'T':
+               return 'V';
+       case 'V':
+               return 'T';
+       default:
+               return speed_grade;
+       }
+}
+
+const struct k3_speed_grade_map *k3_get_speed_grade_map(void)
+{
+       return am62a_map;
+}
+
 /*
  * This uninitialized global variable would normal end up in the .bss section,
  * but the .bss is cleared between writing and reading this variable, so move
@@ -207,6 +245,7 @@ void board_init_f(ulong dummy)
                        printf("Failed to probe am65_cpsw_nuss driver\n");
        }
 
+       k3_fix_rproc_clock("/a53@0");
        debug("am62a_init: %s done\n", __func__);
 }
 

diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h
index f3fd736f31b8444d84e95099441003c572843226..21bed6e2c6e3480ba5be4560bc0d61ece655d333 100644 (file)
--- a/arch/arm/mach-k3/include/mach/am62a_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h
@@ -19,6 +19,10 @@
 #define MCU_CTRL_MMR0_BASE                     0x04500000
 #define WKUP_CTRL_MMR0_BASE                    0x43000000
 
+#define CTRLMMR_WKUP_JTAG_DEVICE_ID            (WKUP_CTRL_MMR0_BASE + 0x18)
+#define JTAG_DEV_SPEED_MASK                    GENMASK(10, 6)
+#define JTAG_DEV_SPEED_SHIFT                   6
+
 #define CTRLMMR_MAIN_DEVSTAT                   (WKUP_CTRL_MMR0_BASE + 0x30)
 #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK     GENMASK(6, 3)
 #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT    3