mips: Fix Ist_CAS for nanoMIPS

This code portion introduced a SEGFAULT:

-  if (&i->NMin.Cas.sz){
+  if (i->NMin.Cas.sz == 8) {

The implementation of Ist_Cas has been fixed and missing logging has been
added as well.

diff --git a/VEX/priv/host_nanomips_defs.c b/VEX/priv/host_nanomips_defs.c
index eadac532bcf01bb82897248f8a525939cadf62cf..9f0b975df35efcf56eddb5ba9b779033bd0efecb 100644 (file)
--- a/VEX/priv/host_nanomips_defs.c
+++ b/VEX/priv/host_nanomips_defs.c
@@ -605,9 +605,8 @@ void ppNANOMIPSInstr(const NANOMIPSInstr* i)
          break;
 
       case NMin_Cas:
-         if (i->NMin.Cas.sz == 4){
-            vex_printf("cas: \n");
-
+         vex_printf("cas: \n");
+         if (i->NMin.Cas.sz == 4) {
             vex_printf("ll ");
             ppHRegNANOMIPS(i->NMin.Cas.oldLo);
             vex_printf(", 0(");
@@ -639,9 +638,61 @@ void ppNANOMIPSInstr(const NANOMIPSInstr* i)
             vex_printf(", ");
             ppHRegNANOMIPS(i->NMin.Cas.dataLo);
             vex_printf("; end:");
-         }
-         else{
-            vassert(0);
+         } else {
+            vex_printf("llwp ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldLo);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldHi);
+            vex_printf(", 0(");
+            ppHRegNANOMIPS(i->NMin.Cas.addr);
+            vex_printf("); ");
+
+            vex_printf("bnec ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldLo);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.expdLo);
+            vex_printf(", end; ");
+
+            vex_printf("bnec ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldHi);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.expdHi);
+            vex_printf(", end; ");
+
+            vex_printf("addiu ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldLo);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldLo);
+            vex_printf(", 1; ");
+
+            vex_printf("addiu ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldHi);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldHi);
+            vex_printf(", 1; ");
+
+            vex_printf("scwp ");
+            ppHRegNANOMIPS(i->NMin.Cas.dataLo);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.dataHi);
+            vex_printf(", 0(");
+            ppHRegNANOMIPS(i->NMin.Cas.addr);
+            vex_printf("); ");
+
+            vex_printf("movn ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldLo);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.expdLo);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.dataLo);
+
+            vex_printf("movn ");
+            ppHRegNANOMIPS(i->NMin.Cas.oldHi);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.expdHi);
+            vex_printf(", ");
+            ppHRegNANOMIPS(i->NMin.Cas.dataHi);
+            vex_printf("; end:");
          }
          break;
 
@@ -807,18 +858,13 @@ void getRegUsage_NANOMIPSInstr(HRegUsage* u, const NANOMIPSInstr* i)
          return;
 
       case NMin_Cas:
-         if (i->NMin.Cas.sz == 4){
-            addHRegUse(u, HRmWrite, i->NMin.Cas.oldLo);
-            addHRegUse(u, HRmRead, i->NMin.Cas.addr);
-            addHRegUse(u, HRmRead, i->NMin.Cas.expdLo);
-            addHRegUse(u, HRmModify, i->NMin.Cas.dataLo);
-         } else {
-            addHRegUse(u, HRmWrite, i->NMin.Cas.oldLo);
+         addHRegUse(u, HRmWrite, i->NMin.Cas.oldLo);
+         addHRegUse(u, HRmRead, i->NMin.Cas.addr);
+         addHRegUse(u, HRmRead, i->NMin.Cas.expdLo);
+         addHRegUse(u, HRmModify, i->NMin.Cas.dataLo);
+         if (i->NMin.Cas.sz == 8) {
             addHRegUse(u, HRmWrite, i->NMin.Cas.oldHi);
-            addHRegUse(u, HRmRead, i->NMin.Cas.addr);
-            addHRegUse(u, HRmRead, i->NMin.Cas.expdLo);
             addHRegUse(u, HRmRead, i->NMin.Cas.expdHi);
-            addHRegUse(u, HRmModify, i->NMin.Cas.dataLo);
             addHRegUse(u, HRmModify, i->NMin.Cas.dataHi);
          }
          return;
@@ -938,7 +984,7 @@ void mapRegs_NANOMIPSInstr(HRegRemap * m, NANOMIPSInstr * i)
          mapReg(m, &i->NMin.Cas.addr);
          mapReg(m, &i->NMin.Cas.expdLo);
          mapReg(m, &i->NMin.Cas.dataLo);
-         if (&i->NMin.Cas.sz){
+         if (i->NMin.Cas.sz == 8) {
             mapReg(m, &i->NMin.Cas.oldHi);
             mapReg(m, &i->NMin.Cas.expdHi);
             mapReg(m, &i->NMin.Cas.dataHi);
@@ -1785,15 +1831,17 @@ Int emit_NANOMIPSInstr ( /*MB_MOD*/Bool* is_profInc,
       }
 
       case NMin_Cas: {
+         vassert((i->NMin.Cas.sz == 4) || (i->NMin.Cas.sz == 8));
          UInt oldLo  = iregNo(i->NMin.Cas.oldLo);
-         UInt oldHi  = iregNo(i->NMin.Cas.oldHi);
          UInt addr = iregNo(i->NMin.Cas.addr);
          UInt expdLo = iregNo(i->NMin.Cas.expdLo);
-         UInt expdHi = iregNo(i->NMin.Cas.expdHi);
          UInt dataLo = iregNo(i->NMin.Cas.dataLo);
-         UInt dataHi = iregNo(i->NMin.Cas.dataHi);
-
-         vassert((i->NMin.Cas.sz == 4) || (i->NMin.Cas.sz == 8));
+         UInt oldHi = 0, expdHi = 0, dataHi = 0;
+         if (i->NMin.Cas.sz == 8) {
+            oldHi  = iregNo(i->NMin.Cas.oldHi);
+            expdHi = iregNo(i->NMin.Cas.expdHi);
+            dataHi = iregNo(i->NMin.Cas.dataHi);
+         }
 
          if (i->NMin.Cas.sz == 4) {
          /*