rs6000: Fix spelling of AltiVec in rs6000.opt (PR79397)

It was spelled Altivec in two user-facing messages in rs6000.opt; let's
be consistent.

	PR translation/79397
	* config/rs6000/rs6000.opt (maltivec=le, maltivec=be): Fix spelling
	of AltiVec.

From-SVN: r245287

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e57f6e19318ca0ecba706d830bb0e73a82428ffb..6dbad39c5d4583ffc70cd6c5c45d4401e5a57687 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-02-08  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR translation/79397
+       * config/rs6000/rs6000.opt (maltivec=le, maltivec=be): Fix spelling
+       of AltiVec.
+
 2017-02-06  Carl Love  <cel@us.ibm.com>
 
        Backport of two commits from mainline, r244943 and r244904,

diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 9e89eb7641e4447ca451f131c2d21295390f4e89..3f317ee3ecb72a7221e3398ed0295736c5eb4f47 100644 (file)
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -142,11 +142,11 @@ Use AltiVec instructions
 
 maltivec=le
 Target Report RejectNegative Var(rs6000_altivec_element_order, 1) Save
-Generate Altivec instructions using little-endian element order
+Generate AltiVec instructions using little-endian element order
 
 maltivec=be
 Target Report RejectNegative Var(rs6000_altivec_element_order, 2)
-Generate Altivec instructions using big-endian element order
+Generate AltiVec instructions using big-endian element order
 
 mhard-dfp
 Target Report Mask(DFP) Var(rs6000_isa_flags)