]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
board: chagall: add Pegatron Chagall support
authorSvyatoslav Ryhel <clamor95@gmail.com>
Sat, 15 Mar 2025 13:13:17 +0000 (15:13 +0200)
committerSvyatoslav Ryhel <clamor95@gmail.com>
Fri, 1 Aug 2025 05:43:41 +0000 (08:43 +0300)
The Pegatron Chagall (originally built by Pegatron, but later rebranded by
other vendors under names Fujitsu Stylistic M532, Olivetti Olipad 3,
Siragon 4N, Realpad Bunaken, DNS AirTab P110w / P110g etc) is a mostly
business-oriented tablet sold in 2012 in different variants, mostly in
Europe, with slight differences in storage size (16GB/32GB) and presence
of built-in cellular modem.

Tested-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
13 files changed:
arch/arm/dts/Makefile
arch/arm/dts/tegra30-pegatron-chagall.dts [new file with mode: 0644]
arch/arm/mach-tegra/tegra30/Kconfig
board/pegatron/chagall/Kconfig [new file with mode: 0644]
board/pegatron/chagall/MAINTAINERS [new file with mode: 0644]
board/pegatron/chagall/Makefile [new file with mode: 0644]
board/pegatron/chagall/chagall-spl.c [new file with mode: 0644]
board/pegatron/chagall/chagall.c [new file with mode: 0644]
board/pegatron/chagall/chagall.env [new file with mode: 0644]
configs/chagall_defconfig [new file with mode: 0644]
doc/board/index.rst
doc/board/pegatron/chagall.rst [new file with mode: 0644]
doc/board/pegatron/index.rst [new file with mode: 0644]

index 0dc7e190eb930f8a67097d14e42c9d1721722fcf..49cf2e9826fa1470a717fab2b98a5f00fbc45946 100644 (file)
@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += \
        tegra30-lg-p895.dtb \
        tegra30-microsoft-surface-rt.dtb \
        tegra30-ouya.dtb \
+       tegra30-pegatron-chagall.dtb \
        tegra30-tec-ng.dtb \
        tegra30-wexler-qc750.dtb \
        tegra114-asus-tf701t.dtb \
diff --git a/arch/arm/dts/tegra30-pegatron-chagall.dts b/arch/arm/dts/tegra30-pegatron-chagall.dts
new file mode 100644 (file)
index 0000000..98eb369
--- /dev/null
@@ -0,0 +1,1291 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "tegra30.dtsi"
+
+/ {
+       model = "Pegatron Chagall";
+       compatible = "pegatron,chagall", "nvidia,tegra30";
+
+       chosen {
+               stdout-path = &uarta;
+       };
+
+       aliases {
+               i2c0 = &pwr_i2c;
+
+               mmc0 = &sdmmc4; /* eMMC */
+               mmc1 = &sdmmc1; /* uSD slot */
+
+               rtc0 = &pmic;
+               rtc1 = "/rtc@7000e000";
+
+               usb0 = &usb1;
+               usb1 = &usb3; /* Dock USB */
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x40000000>;
+       };
+
+       host1x@50000000 {
+               dc@54200000 {
+                       rgb {
+                               status = "okay";
+
+                               port {
+                                       dpi_output: endpoint {
+                                               remote-endpoint = <&bridge_input>;
+                                               bus-width = <24>;
+                                       };
+                               };
+                       };
+               };
+       };
+
+       pinmux@70000868 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&state_default>;
+
+               state_default: pinmux {
+                       /* SDMMC1 pinmux */
+                       sdmmc1_clk_pz0 {
+                               nvidia,pins = "sdmmc1_clk_pz0";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       sdmmc1_dat3_py4 {
+                               nvidia,pins = "sdmmc1_dat3_py4",
+                                               "sdmmc1_dat2_py5",
+                                               "sdmmc1_dat1_py6",
+                                               "sdmmc1_dat0_py7",
+                                               "sdmmc1_cmd_pz1";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* SDMMC2 pinmux */
+                       vi_d1_pd5 {
+                               nvidia,pins = "vi_d1_pd5",
+                                               "vi_d2_pl0",
+                                               "vi_d3_pl1",
+                                               "vi_d5_pl3",
+                                               "vi_d7_pl5";
+                               nvidia,function = "sdmmc2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       vi_d8_pl6 {
+                               nvidia,pins = "vi_d8_pl6",
+                                               "vi_d9_pl7";
+                               nvidia,function = "sdmmc2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <0>;
+                               nvidia,io-reset = <0>;
+                       };
+
+                       /* SDMMC3 pinmux */
+                       sdmmc3_clk_pa6 {
+                               nvidia,pins = "sdmmc3_clk_pa6";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       sdmmc3_cmd_pa7 {
+                               nvidia,pins = "sdmmc3_cmd_pa7",
+                                               "sdmmc3_dat3_pb4",
+                                               "sdmmc3_dat2_pb5",
+                                               "sdmmc3_dat1_pb6",
+                                               "sdmmc3_dat0_pb7",
+                                               "sdmmc3_dat5_pd0",
+                                               "sdmmc3_dat4_pd1",
+                                               "sdmmc3_dat6_pd3",
+                                               "sdmmc3_dat7_pd4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* SDMMC4 pinmux */
+                       sdmmc4_clk_pcc4 {
+                               nvidia,pins = "sdmmc4_clk_pcc4";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       sdmmc4_cmd_pt7 {
+                               nvidia,pins = "sdmmc4_cmd_pt7",
+                                               "sdmmc4_dat0_paa0",
+                                               "sdmmc4_dat1_paa1",
+                                               "sdmmc4_dat2_paa2",
+                                               "sdmmc4_dat3_paa3",
+                                               "sdmmc4_dat4_paa4",
+                                               "sdmmc4_dat5_paa5",
+                                               "sdmmc4_dat6_paa6",
+                                               "sdmmc4_dat7_paa7";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* I2C pinmux */
+                       gen1_i2c_scl_pc4 {
+                               nvidia,pins = "gen1_i2c_scl_pc4",
+                                               "gen1_i2c_sda_pc5";
+                               nvidia,function = "i2c1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <0>;
+                       };
+
+                       gen2_i2c_scl_pt5 {
+                               nvidia,pins = "gen2_i2c_scl_pt5",
+                                               "gen2_i2c_sda_pt6";
+                               nvidia,function = "i2c2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <0>;
+                       };
+
+                       cam_i2c_scl_pbb1 {
+                               nvidia,pins = "cam_i2c_scl_pbb1",
+                                               "cam_i2c_sda_pbb2";
+                               nvidia,function = "i2c3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <0>;
+                       };
+
+                       ddc_scl_pv4 {
+                               nvidia,pins = "ddc_scl_pv4",
+                                               "ddc_sda_pv5";
+                               nvidia,function = "i2c4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <0>;
+                       };
+
+                       pwr_i2c_scl_pz6 {
+                               nvidia,pins = "pwr_i2c_scl_pz6",
+                                               "pwr_i2c_sda_pz7";
+                               nvidia,function = "i2cpwr";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <0>;
+                       };
+
+                       /* HDMI-CEC pinmux */
+                       hdmi_cec_pee3 {
+                               nvidia,pins = "hdmi_cec_pee3";
+                               nvidia,function = "cec";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <0>;
+                       };
+
+                       /* UART-A */
+                       ulpi_data0_po1 {
+                               nvidia,pins = "ulpi_data0_po1";
+                               nvidia,function = "uarta";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       ulpi_data1_po2 {
+                               nvidia,pins = "ulpi_data1_po2",
+                                               "ulpi_data2_po3",
+                                               "ulpi_data3_po4",
+                                               "ulpi_data4_po5",
+                                               "ulpi_data5_po6",
+                                               "ulpi_data6_po7";
+                               nvidia,function = "uarta";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       ulpi_data7_po0 {
+                               nvidia,pins = "ulpi_data7_po0";
+                               nvidia,function = "uarta";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* UART-B */
+                       uart2_txd_pc2 {
+                               nvidia,pins = "uart2_txd_pc2",
+                                               "uart2_rts_n_pj6";
+                               nvidia,function = "uartb";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       uart2_rxd_pc3 {
+                               nvidia,pins = "uart2_rxd_pc3",
+                                               "uart2_cts_n_pj5";
+                               nvidia,function = "uartb";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* UART-C */
+                       uart3_cts_n_pa1 {
+                               nvidia,pins = "uart3_cts_n_pa1",
+                                               "uart3_rxd_pw7";
+                               nvidia,function = "uartc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       uart3_rts_n_pc0 {
+                               nvidia,pins = "uart3_rts_n_pc0",
+                                               "uart3_txd_pw6";
+                               nvidia,function = "uartc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* UART-D */
+                       ulpi_clk_py0 {
+                               nvidia,pins = "ulpi_clk_py0",
+                                               "ulpi_stp_py3";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       ulpi_dir_py1 {
+                               nvidia,pins = "ulpi_dir_py1",
+                                               "ulpi_nxt_py2";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* I2S pinmux */
+                       dap1_fs_pn0 {
+                               nvidia,pins = "dap1_fs_pn0",
+                                               "dap1_din_pn1",
+                                               "dap1_dout_pn2",
+                                               "dap1_sclk_pn3";
+                               nvidia,function = "i2s0";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       dap2_fs_pa2 {
+                               nvidia,pins = "dap2_fs_pa2",
+                                               "dap2_sclk_pa3",
+                                               "dap2_din_pa4",
+                                               "dap2_dout_pa5";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       dap3_fs_pp0 {
+                               nvidia,pins = "dap3_fs_pp0",
+                                               "dap3_din_pp1",
+                                               "dap3_dout_pp2",
+                                               "dap3_sclk_pp3";
+                               nvidia,function = "i2s2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       dap4_fs_pp4 {
+                               nvidia,pins = "dap4_fs_pp4",
+                                               "dap4_din_pp5",
+                                               "dap4_dout_pp6",
+                                               "dap4_sclk_pp7";
+                               nvidia,function = "i2s3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pcc2 {
+                               nvidia,pins = "pcc2";
+                               nvidia,function = "i2s4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* PCI-e pinmux */
+                       pex_l2_rst_n_pcc6 {
+                               nvidia,pins = "pex_l2_rst_n_pcc6",
+                                               "pex_l0_rst_n_pdd1",
+                                               "pex_l1_rst_n_pdd5";
+                               nvidia,function = "pcie";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       pex_l2_clkreq_n_pcc7 {
+                               nvidia,pins = "pex_l2_clkreq_n_pcc7",
+                                               "pex_l0_prsnt_n_pdd0",
+                                               "pex_l0_clkreq_n_pdd2",
+                                               "pex_l2_prsnt_n_pdd7";
+                               nvidia,function = "pcie";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pex_wake_n_pdd3 {
+                               nvidia,pins = "pex_wake_n_pdd3";
+                               nvidia,function = "pcie";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* SPI pinmux */
+                       spi1_mosi_px4 {
+                               nvidia,pins = "spi1_mosi_px4",
+                                               "spi1_sck_px5",
+                                               "spi1_cs0_n_px6",
+                                               "spi1_miso_px7";
+                               nvidia,function = "spi1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       spi2_cs1_n_pw2 {
+                               nvidia,pins = "spi2_cs1_n_pw2",
+                                               "spi2_cs2_n_pw3";
+                               nvidia,function = "spi2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       spi2_sck_px2 {
+                               nvidia,pins = "spi2_sck_px2";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       gmi_a16_pj7 {
+                               nvidia,pins = "gmi_a16_pj7",
+                                               "gmi_a19_pk7";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       gmi_a17_pb0 {
+                               nvidia,pins = "gmi_a17_pb0",
+                                               "gmi_a18_pb1";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       spi2_mosi_px0 {
+                               nvidia,pins = "spi2_mosi_px0";
+                               nvidia,function = "spi6";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       spdif_out_pk5 {
+                               nvidia,pins = "spdif_out_pk5";
+                               nvidia,function = "spdif";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       spdif_in_pk6 {
+                               nvidia,pins = "spdif_in_pk6";
+                               nvidia,function = "spdif";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* Display A pinmux */
+                       lcd_pwr0_pb2 {
+                               nvidia,pins = "lcd_pwr0_pb2",
+                                               "lcd_pclk_pb3",
+                                               "lcd_pwr1_pc1",
+                                               "lcd_pwr2_pc6",
+                                               "lcd_d0_pe0",
+                                               "lcd_d1_pe1",
+                                               "lcd_d2_pe2",
+                                               "lcd_d3_pe3",
+                                               "lcd_d4_pe4",
+                                               "lcd_d5_pe5",
+                                               "lcd_d6_pe6",
+                                               "lcd_d7_pe7",
+                                               "lcd_d8_pf0",
+                                               "lcd_d9_pf1",
+                                               "lcd_d10_pf2",
+                                               "lcd_d11_pf3",
+                                               "lcd_d12_pf4",
+                                               "lcd_d13_pf5",
+                                               "lcd_d14_pf6",
+                                               "lcd_d15_pf7",
+                                               "lcd_de_pj1",
+                                               "lcd_hsync_pj3",
+                                               "lcd_vsync_pj4",
+                                               "lcd_d16_pm0",
+                                               "lcd_d17_pm1",
+                                               "lcd_d18_pm2",
+                                               "lcd_d19_pm3",
+                                               "lcd_d20_pm4",
+                                               "lcd_d21_pm5",
+                                               "lcd_d22_pm6",
+                                               "lcd_d23_pm7",
+                                               "lcd_cs0_n_pn4",
+                                               "lcd_sdout_pn5",
+                                               "lcd_dc0_pn6",
+                                               "lcd_sdin_pz2",
+                                               "lcd_wr_n_pz3",
+                                               "lcd_sck_pz4",
+                                               "lcd_cs1_n_pw0",
+                                               "lcd_m1_pw1";
+                               nvidia,function = "displaya";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       lcd_dc1_pd2 {
+                               nvidia,pins = "lcd_dc1_pd2";
+                               nvidia,function = "displaya";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       clk_32k_out_pa0 {
+                               nvidia,pins = "clk_32k_out_pa0";
+                               nvidia,function = "blink";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* KBC keys */
+                       kb_row0_pr0 {
+                               nvidia,pins = "kb_row0_pr0",
+                                               "kb_row1_pr1",
+                                               "kb_row2_pr2",
+                                               "kb_row3_pr3",
+                                               "kb_row8_ps0",
+                                               "kb_col0_pq0",
+                                               "kb_col1_pq1",
+                                               "kb_col2_pq2",
+                                               "kb_col3_pq3",
+                                               "kb_col4_pq4",
+                                               "kb_col5_pq5",
+                                               "kb_col7_pq7";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       kb_row4_pr4 {
+                               nvidia,pins = "kb_row4_pr4",
+                                               "kb_row7_pr7",
+                                               "kb_row10_ps2",
+                                               "kb_row13_ps5";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       kb_row11_ps3 {
+                               nvidia,pins = "kb_row11_ps3",
+                                               "kb_row12_ps4",
+                                               "kb_row15_ps7";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       kb_row14_ps6 {
+                               nvidia,pins = "kb_row14_ps6";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       gmi_iordy_pi5 {
+                               nvidia,pins = "gmi_iordy_pi5";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       vi_pclk_pt0 {
+                               nvidia,pins = "vi_pclk_pt0";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <0>;
+                               nvidia,io-reset = <0>;
+                       };
+
+                       pu1 {
+                               nvidia,pins = "pu1";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       pu2 {
+                               nvidia,pins = "pu2";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pv0 {
+                               nvidia,pins = "pv0";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pv1 {
+                               nvidia,pins = "pv1";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pcc1 {
+                               nvidia,pins = "pcc1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       sdmmc4_rst_n_pcc3 {
+                               nvidia,pins = "sdmmc4_rst_n_pcc3";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       pv3 {
+                               nvidia,pins = "pv3";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       vi_vsync_pd6 {
+                               nvidia,pins = "vi_vsync_pd6",
+                                               "vi_hsync_pd7";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <0>;
+                               nvidia,io-reset = <0>;
+                       };
+
+                       vi_d10_pt2 {
+                               nvidia,pins = "vi_d10_pt2",
+                                               "vi_d0_pt4", "pbb0";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       vi_d11_pt3 {
+                               nvidia,pins = "vi_d11_pt3";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pu0 {
+                               nvidia,pins = "pu0";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pu3 {
+                               nvidia,pins = "pu3";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pu6 {
+                               nvidia,pins = "pu6";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pex_l1_prsnt_n_pdd4 {
+                               nvidia,pins = "pex_l1_prsnt_n_pdd4",
+                                               "pex_l1_clkreq_n_pdd6";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       gmi_wait_pi7 {
+                               nvidia,pins = "gmi_wait_pi7",
+                                               "gmi_cs0_n_pj0",
+                                               "gmi_cs1_n_pj2",
+                                               "gmi_cs4_n_pk2";
+                               nvidia,function = "nand";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       gmi_ad0_pg0 {
+                               nvidia,pins = "gmi_ad0_pg0",
+                                               "gmi_ad1_pg1",
+                                               "gmi_ad2_pg2",
+                                               "gmi_ad3_pg3",
+                                               "gmi_ad4_pg4",
+                                               "gmi_ad5_pg5",
+                                               "gmi_ad6_pg6",
+                                               "gmi_ad7_pg7",
+                                               "gmi_wr_n_pi0",
+                                               "gmi_oe_n_pi1",
+                                               "gmi_dqs_pi2",
+                                               "gmi_adv_n_pk0",
+                                               "gmi_clk_pk1";
+                               nvidia,function = "nand";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       gmi_cs2_n_pk3 {
+                               nvidia,pins = "gmi_cs2_n_pk3";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       gmi_cs3_n_pk4 {
+                               nvidia,pins = "gmi_cs3_n_pk4";
+                               nvidia,function = "nand";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       gmi_ad10_ph2 {
+                               nvidia,pins = "gmi_ad10_ph2",
+                                               "gmi_ad11_ph3",
+                                               "gmi_ad14_ph6";
+                               nvidia,function = "nand";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       gmi_ad13_ph5 {
+                               nvidia,pins = "gmi_ad13_ph5",
+                                               "gmi_ad12_ph4",
+                                               "gmi_cs7_n_pi6";
+                               nvidia,function = "nand";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       gmi_rst_n_pi4 {
+                               nvidia,pins = "gmi_rst_n_pi4";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       gmi_ad8_ph0 {
+                               nvidia,pins = "gmi_ad8_ph0";
+                               nvidia,function = "pwm0";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       gmi_ad9_ph1 {
+                               nvidia,pins = "gmi_ad9_ph1";
+                               nvidia,function = "pwm1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       gmi_wp_n_pc7 {
+                               nvidia,pins = "gmi_wp_n_pc7";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       gmi_cs6_n_pi3 {
+                               nvidia,pins = "gmi_cs6_n_pi3";
+                               nvidia,function = "sata";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       vi_d4_pl2 {
+                               nvidia,pins = "vi_d4_pl2";
+                               nvidia,function = "vi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       vi_d6_pl4 {
+                               nvidia,pins = "vi_d6_pl4";
+                               nvidia,function = "vi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                               nvidia,lock = <0>;
+                               nvidia,io-reset = <0>;
+                       };
+
+                       vi_mclk_pt1 {
+                               nvidia,pins = "vi_mclk_pt1";
+                               nvidia,function = "vi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* HDMI hot-plug-detect */
+                       hdmi_int_pn7 {
+                               nvidia,pins = "hdmi_int_pn7";
+                               nvidia,function = "hdmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pu4 {
+                               nvidia,pins = "pu4";
+                               nvidia,function = "pwm1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       pu5 {
+                               nvidia,pins = "pu5";
+                               nvidia,function = "pwm2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       jtag_rtck_pu7 {
+                               nvidia,pins = "jtag_rtck_pu7";
+                               nvidia,function = "rtck";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       crt_hsync_pv6 {
+                               nvidia,pins = "crt_hsync_pv6",
+                                               "crt_vsync_pv7";
+                               nvidia,function = "crt";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       clk1_out_pw4 {
+                               nvidia,pins = "clk1_out_pw4";
+                               nvidia,function = "extperiph1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       clk2_out_pw5 {
+                               nvidia,pins = "clk2_out_pw5";
+                               nvidia,function = "extperiph2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       clk3_out_pee0 {
+                               nvidia,pins = "clk3_out_pee0";
+                               nvidia,function = "extperiph3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       sys_clk_req_pz5 {
+                               nvidia,pins = "sys_clk_req_pz5";
+                               nvidia,function = "sysclk";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       pbb4 {
+                               nvidia,pins = "pbb4";
+                               nvidia,function = "vgp4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pbb5 {
+                               nvidia,pins = "pbb5";
+                               nvidia,function = "vgp5";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pbb6 {
+                               nvidia,pins = "pbb6";
+                               nvidia,function = "vgp6";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       clk1_req_pee2 {
+                               nvidia,pins = "clk1_req_pee2";
+                               nvidia,function = "dap";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       clk2_req_pcc5 {
+                               nvidia,pins = "clk2_req_pcc5";
+                               nvidia,function = "dap";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       clk3_req_pee1 {
+                               nvidia,pins = "clk3_req_pee1";
+                               nvidia,function = "dev3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       owr {
+                               nvidia,pins = "owr";
+                               nvidia,function = "owr";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pv2 {
+                               nvidia,pins = "pv2",
+                                               "kb_row5_pr5";
+                               nvidia,function = "owr";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       pbb3 {
+                               nvidia,pins = "pbb3";
+                               nvidia,function = "vgp3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       pbb7 {
+                               nvidia,pins = "pbb7";
+                               nvidia,function = "i2s4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       cam_mclk_pcc0 {
+                               nvidia,pins = "cam_mclk_pcc0";
+                               nvidia,function = "vi_alt3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* GPIO power/drive control */
+                       drive_dap1 {
+                               nvidia,pins = "drive_dap1",
+                                               "drive_dap2",
+                                               "drive_dbg",
+                                               "drive_at5",
+                                               "drive_gme",
+                                               "drive_ddc",
+                                               "drive_ao1",
+                                               "drive_uart3";
+                               nvidia,high-speed-mode = <0>;
+                               nvidia,schmitt = <TEGRA_PIN_ENABLE>;
+                               nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+                               nvidia,pull-down-strength = <31>;
+                               nvidia,pull-up-strength = <31>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       };
+
+                       drive_sdio1 {
+                               nvidia,pins = "drive_sdio1";
+                               nvidia,high-speed-mode = <0>;
+                               nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                               nvidia,pull-down-strength = <5>;
+                               nvidia,pull-up-strength = <5>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
+                       };
+
+                       drive_sdio3 {
+                               nvidia,pins = "drive_sdio3";
+                               nvidia,high-speed-mode = <0>;
+                               nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                               nvidia,pull-down-strength = <46>;
+                               nvidia,pull-up-strength = <42>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
+                       };
+
+                       drive_gma {
+                               nvidia,pins = "drive_gma",
+                                               "drive_gmb",
+                                               "drive_gmc",
+                                               "drive_gmd";
+                               nvidia,pull-down-strength = <9>;
+                               nvidia,pull-up-strength = <9>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+                       };
+
+                       drive_lcd2 {
+                               nvidia,pins = "drive_lcd2";
+                               nvidia,high-speed-mode = <0>;
+                               nvidia,schmitt = <TEGRA_PIN_ENABLE>;
+                               nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_4>;
+                               nvidia,pull-down-strength = <20>;
+                               nvidia,pull-up-strength = <20>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       };
+               };
+       };
+
+       uarta: serial@70006000 {
+               status = "okay";
+       };
+
+       pwm: pwm@7000a000 {
+               status = "okay";
+       };
+
+       pwr_i2c: i2c@7000d000 {
+               status = "okay";
+               clock-frequency = <400000>;
+
+               /* Texas Instruments TPS659110 PMIC */
+               pmic: tps65911@2d {
+                       compatible = "ti,tps65911";
+                       reg = <0x2d>;
+
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+
+                       ti,system-power-controller;
+
+                       #gpio-cells = <2>;
+                       gpio-controller;
+
+                       regulators {
+                               vdd_1v8_vio: vddio {
+                                       regulator-name = "vdd_1v8_gen";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               /* eMMC VDD */
+                               vcore_emmc: ldo1 {
+                                       regulator-name = "vdd_emmc_core";
+                                       regulator-min-microvolt = <3300000>;
+                                       regulator-max-microvolt = <3300000>;
+                                       regulator-boot-on;
+                               };
+
+                               /* uSD slot VDD */
+                               vdd_usd: ldo2 {
+                                       regulator-name = "vdd_usd";
+                                       regulator-min-microvolt = <3100000>;
+                                       regulator-max-microvolt = <3100000>;
+                                       regulator-boot-on;
+                               };
+
+                               /* uSD slot VDDIO */
+                               vddio_usd: ldo3 {
+                                       regulator-name = "vddio_usd";
+                                       regulator-min-microvolt = <3100000>;
+                                       regulator-max-microvolt = <3100000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+                       };
+               };
+       };
+
+       sdmmc1: sdhci@78000000 {
+               status = "okay";
+               bus-width = <4>;
+
+               cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
+
+               vmmc-supply = <&vdd_usd>;
+               vqmmc-supply = <&vddio_usd>;
+       };
+
+       sdmmc4: sdhci@78000600 {
+               status = "okay";
+               bus-width = <8>;
+               non-removable;
+
+               vmmc-supply = <&vcore_emmc>;
+               vqmmc-supply = <&vdd_1v8_vio>;
+       };
+
+       usb1: usb@7d000000 {
+               status = "okay";
+               dr_mode = "otg";
+               nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 3) GPIO_ACTIVE_HIGH>;
+       };
+
+       usb-phy@7d000000 {
+               status = "okay";
+               nvidia,hssync-start-delay = <0>;
+               nvidia,xcvr-lsfslew = <2>;
+               nvidia,xcvr-lsrslew = <2>;
+       };
+
+       usb3: usb@7d008000 {
+               status = "okay";
+               nvidia,vbus-gpio = <&gpio TEGRA_GPIO(CC, 6) GPIO_ACTIVE_HIGH>;
+       };
+
+       usb-phy@7d008000 {
+               status = "okay";
+       };
+
+       backlight: backlight {
+               compatible = "pwm-backlight";
+
+               enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+               power-supply = <&vdd_5v0_bl>;
+               pwms = <&pwm 0 5000000>;
+
+               brightness-levels = <1 35 70 105 140 175 210 255>;
+               default-brightness-level = <5>;
+       };
+
+       /* PMIC has a built-in 32KHz oscillator which is used by PMC */
+       clk32k_in: clock-32k {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <32768>;
+               clock-output-names = "pmic-oscillator";
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               key-power {
+                       label = "Power";
+                       gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_ENTER>;
+               };
+
+               key-volume-up {
+                       label = "Volume Up";
+                       gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_UP>;
+               };
+
+               key-volume-down {
+                       label = "Volume Down";
+                       gpios = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_DOWN>;
+               };
+       };
+
+       display-panel {
+               compatible = "hannstar,hsd101pww2", "simple-panel";
+
+               power-supply = <&vdd_pnl_reg>;
+               backlight = <&backlight>;
+
+               display-timings {
+                       timing@0 {
+                               /* 1280x800@60Hz */
+                               clock-frequency = <68000000>;
+
+                               hactive = <1280>;
+                               hfront-porch = <48>;
+                               hback-porch = <18>;
+                               hsync-len = <30>;
+
+                               vactive = <800>;
+                               vfront-porch = <3>;
+                               vback-porch = <12>;
+                               vsync-len = <5>;
+                       };
+               };
+
+               port {
+                       panel_input: endpoint {
+                               remote-endpoint = <&bridge_output>;
+                       };
+               };
+       };
+
+       /* Texas Instruments SN75LVDS83B LVDS Transmitter */
+       lvds-encoder {
+               compatible = "ti,sn75lvds83", "lvds-encoder";
+
+               powerdown-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
+               power-supply = <&vdd_3v3_sys>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               bridge_input: endpoint {
+                                       remote-endpoint = <&dpi_output>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+
+                               bridge_output: endpoint {
+                                       remote-endpoint = <&panel_input>;
+                               };
+                       };
+               };
+       };
+
+       vdd_3v3_sys: regulator-3v {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd_3v3_sys";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       vdd_pnl_reg: regulator-pnl {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd_panel";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vdd_5v0_bl: regulator-bl {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd_5v0_bl";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+};
index b5099ce67fc401c5af7b21551bc4a6778581d710..4da67b19990f5774a1b0d340d377bfebcd968e0c 100644 (file)
@@ -16,6 +16,10 @@ config TARGET_CARDHU
        bool "NVIDIA Tegra30 Cardhu evaluation board"
        select BOARD_LATE_INIT
 
+config TARGET_CHAGALL
+       bool "Pegatron Tegra30 Chagall board"
+       select BOARD_LATE_INIT
+
 config TARGET_COLIBRI_T30
        bool "Toradex Colibri T30 board"
        select BOARD_LATE_INIT
@@ -64,6 +68,7 @@ config SYS_SOC
 source "board/toradex/apalis_t30/Kconfig"
 source "board/nvidia/beaver/Kconfig"
 source "board/nvidia/cardhu/Kconfig"
+source "board/pegatron/chagall/Kconfig"
 source "board/toradex/colibri_t30/Kconfig"
 source "board/htc/endeavoru/Kconfig"
 source "board/asus/grouper/Kconfig"
diff --git a/board/pegatron/chagall/Kconfig b/board/pegatron/chagall/Kconfig
new file mode 100644 (file)
index 0000000..8c229d0
--- /dev/null
@@ -0,0 +1,13 @@
+if TARGET_CHAGALL
+
+config SYS_BOARD
+       default "chagall"
+
+config SYS_VENDOR
+       default "pegatron"
+
+config TEGRA_BOARD_STRING
+       string "Default Tegra board name"
+       default "Pegatron Chagall"
+
+endif
diff --git a/board/pegatron/chagall/MAINTAINERS b/board/pegatron/chagall/MAINTAINERS
new file mode 100644 (file)
index 0000000..5ebd594
--- /dev/null
@@ -0,0 +1,7 @@
+CHAGALL BOARD
+M:     Svyatoslav Ryhel <clamor95@gmail.com>
+S:     Maintained
+F:     arch/arm/dts/tegra30-pegatron-chagall.dts
+F:     board/pegatron/chagall/
+F:     configs/chagall_defconfig
+F:     doc/board/pegatron/chagall.rst
diff --git a/board/pegatron/chagall/Makefile b/board/pegatron/chagall/Makefile
new file mode 100644 (file)
index 0000000..17cfef5
--- /dev/null
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+#  (C) Copyright 2010-2012
+#  NVIDIA Corporation <www.nvidia.com>
+#
+#  (C) Copyright 2021
+#  Svyatoslav Ryhel <clamor95@gmail.com>
+
+obj-$(CONFIG_XPL_BUILD) += chagall-spl.o
+
+obj-y += chagall.o
diff --git a/board/pegatron/chagall/chagall-spl.c b/board/pegatron/chagall/chagall-spl.c
new file mode 100644 (file)
index 0000000..6c27197
--- /dev/null
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  Chagall SPL stage configuration
+ *
+ *  (C) Copyright 2010-2013
+ *  NVIDIA Corporation <www.nvidia.com>
+ *
+ *  (C) Copyright 2021
+ *  Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <asm/arch/tegra.h>
+#include <asm/arch-tegra/tegra_i2c.h>
+#include <linux/delay.h>
+
+#define TPS65911_I2C_ADDR              (0x2D << 1)
+#define TPS65911_VDDCTRL_OP_REG                0x28
+#define TPS65911_VDDCTRL_SR_REG                0x27
+#define TPS65911_VDDCTRL_OP_DATA       (0x2400 | TPS65911_VDDCTRL_OP_REG)
+#define TPS65911_VDDCTRL_SR_DATA       (0x0100 | TPS65911_VDDCTRL_SR_REG)
+
+#define TPS62361B_I2C_ADDR             (0x60 << 1)
+#define TPS62361B_SET3_REG             0x03
+#define TPS62361B_SET3_DATA            (0x4600 | TPS62361B_SET3_REG)
+
+void pmic_enable_cpu_vdd(void)
+{
+       /* Set VDD_CORE to 1.200V. */
+       tegra_i2c_ll_write(TPS62361B_I2C_ADDR, TPS62361B_SET3_DATA);
+
+       udelay(1000);
+
+       /*
+        * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus.
+        * First set VDD to 1.0125V, then enable the VDD regulator.
+        */
+       tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_OP_DATA);
+       udelay(1000);
+       tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_SR_DATA);
+       udelay(10 * 1000);
+}
diff --git a/board/pegatron/chagall/chagall.c b/board/pegatron/chagall/chagall.c
new file mode 100644 (file)
index 0000000..1412c4f
--- /dev/null
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  (C) Copyright 2010-2013
+ *  NVIDIA Corporation <www.nvidia.com>
+ *
+ *  (C) Copyright 2021
+ *  Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+/* Chagall derives from Cardhu board */
+
+#include <fdt_support.h>
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+       /* Remove TrustZone nodes */
+       fdt_del_node_and_alias(blob, "/firmware");
+       fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000");
+
+       return 0;
+}
+#endif
diff --git a/board/pegatron/chagall/chagall.env b/board/pegatron/chagall/chagall.env
new file mode 100644 (file)
index 0000000..68bf51b
--- /dev/null
@@ -0,0 +1,9 @@
+button_cmd_0_name=Volume Down
+button_cmd_0=bootmenu
+
+bootmenu_0=mount external storage=usb start && ums 0 mmc 1; bootmenu
+bootmenu_1=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu
+bootmenu_2=reboot RCM=enterrcm
+bootmenu_3=reboot=reset
+bootmenu_4=power off=poweroff
+bootmenu_delay=-1
diff --git a/configs/chagall_defconfig b/configs/chagall_defconfig
new file mode 100644 (file)
index 0000000..9ad5fb9
--- /dev/null
@@ -0,0 +1,80 @@
+CONFIG_ARM=y
+CONFIG_ARCH_TEGRA=y
+CONFIG_SUPPORT_PASSING_ATAGS=y
+CONFIG_CMDLINE_TAG=y
+CONFIG_INITRD_TAG=y
+CONFIG_TEXT_BASE=0x80110000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_ENV_SOURCE_FILE="chagall"
+CONFIG_ENV_SIZE=0x3000
+CONFIG_ENV_OFFSET=0xFFFFD000
+CONFIG_DEFAULT_DEVICE_TREE="tegra30-pegatron-chagall"
+CONFIG_SPL_STACK=0x800ffffc
+CONFIG_SPL_TEXT_BASE=0x80108000
+CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_TEGRA30=y
+CONFIG_TARGET_CHAGALL=y
+CONFIG_BUTTON_CMD=y
+CONFIG_BOOTDELAY=0
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_KEYED_CTRLC=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_BOOTCOMMAND="bootflow scan; echo 'Boot configuration not found... Power off in 3 sec'; sleep 3; poweroff"
+CONFIG_SYS_PBSIZE=2084
+CONFIG_SPL_FOOTPRINT_LIMIT=y
+CONFIG_SPL_MAX_FOOTPRINT=0x8000
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_HAVE_INIT_STACK=y
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80090000
+CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
+CONFIG_SYS_PROMPT="Tegra30 (Chagall) # "
+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_UMS_ABORT_KEYED=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PAUSE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_ENV_OVERWRITE=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_PART=2
+CONFIG_BUTTON=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x91000000
+CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_TEGRA=y
+CONFIG_BUTTON_KEYBOARD=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_TPS65910=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_TPS65911=y
+CONFIG_PWM_TEGRA=y
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET_TPS65910=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_TEGRA=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_LOGO is not set
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_VIDEO_BRIDGE_LVDS_CODEC=y
+CONFIG_VIDEO_TEGRA=y
index e084c7fb1dfd86e369b4435c6bdb2461b3110eed..7870f1bc2461b16e970ce8e58e3d05ba0f2c9b20 100644 (file)
@@ -47,6 +47,7 @@ Board-specific doc
    nxp/index
    openpiton/index
    ouya/index
+   pegatron/index
    phytec/index
    purism/index
    qualcomm/index
diff --git a/doc/board/pegatron/chagall.rst b/doc/board/pegatron/chagall.rst
new file mode 100644 (file)
index 0000000..18ed425
--- /dev/null
@@ -0,0 +1,41 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the Pegatron Chagall tablet
+======================================
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Boot
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-none-eabi-
+    $ make chagall_defconfig
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
+image, ready for loading.
+
+Boot
+----
+
+Currently, U-Boot can be preloaded into RAM via the Fusée Gelée. To enter
+RCM protocol use ``power`` and ``volume up`` key combination from powered
+off device. The host PC should recognize an APX device.
+
+Built U-Boot ``u-boot-dtb-tegra.bin`` can be loaded from fusee-tools
+directory with
+
+.. code-block:: bash
+
+    $ ./run_bootloader.sh -s T30 -t ./bct/chagall.bct
+
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
+eMMC. Additionally, if the Volume Down button is pressed while loading, the
+device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
+as mass storage, fastboot, reboot, reboot RCM and poweroff.
diff --git a/doc/board/pegatron/index.rst b/doc/board/pegatron/index.rst
new file mode 100644 (file)
index 0000000..8fd8d5f
--- /dev/null
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Pegatron
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   chagall