arm64: dts: s32g: add RTC node

The RTC module on S32G2/S32G3 based SoCs is used as a wakeup source from
system suspend.

Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index 68848575bf812cc3d0dd1956c0e332d03cfae665..da79bb9daa357d96036f44f92ad62d880614aa77 100644 (file)
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -114,6 +114,14 @@
                #size-cells = <1>;
                ranges = <0 0 0 0x80000000>;
 
+               rtc0: rtc@40060000 {
+                       compatible = "nxp,s32g2-rtc";
+                       reg = <0x40060000 0x1000>;
+                       interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 54>, <&clks 55>;
+                       clock-names = "ipg", "source0";
+               };
+
                pinctrl: pinctrl@4009c240 {
                        compatible = "nxp,s32g2-siul2-pinctrl";
                                /* MSCR0-MSCR101 registers on siul2_0 */

diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index 4f883b1a50ad919b1a619a60c0fb2c17e8cb1f8f..9af35e82fdc9de048cc8390cf0571b0e328a2b59 100644 (file)
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -171,6 +171,15 @@
                #size-cells = <1>;
                ranges = <0 0 0 0x80000000>;
 
+               rtc0: rtc@40060000 {
+                       compatible = "nxp,s32g3-rtc",
+                                    "nxp,s32g2-rtc";
+                       reg = <0x40060000 0x1000>;
+                       interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 54>, <&clks 55>;
+                       clock-names = "ipg", "source0";
+               };
+
                pinctrl: pinctrl@4009c240 {
                        compatible = "nxp,s32g2-siul2-pinctrl";
                                /* MSCR0-MSCR101 registers on siul2_0 */