[AArch64] Document several AArch64-specific test directives

2015-07-01  Jiong Wang  <jiong.wang@arm.com>

	* doc/sourcebuild.texi (AArch64-specific attributes): Document
	"aarch64_tiny", "aarch64_small", "aarch64_large",
	"aarch64_little_endian", "aarch64_big_endian".

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@225233 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6df579b0f96f14537e826f7dd69c6f45f6b3cb74..eab90cff91f683d29d09cec4db3120c9c7e44d5c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-07-01  Jiong Wang  <jiong.wang@arm.com>
+
+       * doc/sourcebuild.texi (AArch64-specific attributes): Document
+       "aarch64_tiny", "aarch64_small", "aarch64_large",
+       "aarch64_little_endian", "aarch64_big_endian".
+
 2015-07-01  Jiong Wang  <jiong.wang@arm.com>
 
        * doc/sourcebuild.texi (AArch64-specific attributes): New subsection.

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 52a4aa48be14eb12db5963f242649d609a3d5d3f..d339d1e5d8a0eefbc5cbdc5a0be69930a91e04f6 100644 (file)
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1583,6 +1583,16 @@ ARM target prefers @code{LDRD} and @code{STRD} instructions over
 @subsubsection AArch64-specific attributes
 
 @table @code
+@item aarch64_tiny
+AArch64 target which generates instruction sequences for tiny memory model.
+@item aarch64_small
+AArch64 target which generates instruction sequences for small memory model.
+@item aarch64_large
+AArch64 target which generates instruction sequences for large memory model.
+@item aarch64_little_endian
+AArch64 target which generates instruction sequences for little endian.
+@item aarch64_big_endian
+AArch64 target which generates instruction sequences for big endian.
 @item aarch64_small_fpic
 Binutils installed on test system supports relocation types required by -fpic
 for AArch64 small memory model.