arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones

Add cooling-maps to the cpu1, cpu2, and cpu3 thermal zones to associate
passive trip points with CPU cooling devices. This enables proper
thermal mitigation by allowing the thermal framework to throttle CPUs
based on temperature thresholds. Also, label the trip points to allow
referencing them in the cooling maps.

Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251023043838.1603673-1-quic_mmanikan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index ef2b52f3597d9bf218ce7b73d8a65e6745bb26d5..e4a51eeefeac4fa145a6d7b144ca4114029aaf68 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/reset/qcom,ipq5424-gcc.h>
 #include <dt-bindings/interconnect/qcom,ipq5424.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
        #address-cells = <2>;
@@ -57,6 +58,7 @@
                        clock-names = "cpu";
                        operating-points-v2 = <&cpu_opp_table>;
                        interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
+                       #cooling-cells = <2>;
 
                        l2_0: l2-cache {
                                compatible = "cache";
@@ -82,6 +84,7 @@
                        clock-names = "cpu";
                        operating-points-v2 = <&cpu_opp_table>;
                        interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
+                       #cooling-cells = <2>;
 
                        l2_100: l2-cache {
                                compatible = "cache";
@@ -101,6 +104,7 @@
                        clock-names = "cpu";
                        operating-points-v2 = <&cpu_opp_table>;
                        interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
+                       #cooling-cells = <2>;
 
                        l2_200: l2-cache {
                                compatible = "cache";
@@ -120,6 +124,7 @@
                        clock-names = "cpu";
                        operating-points-v2 = <&cpu_opp_table>;
                        interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
+                       #cooling-cells = <2>;
 
                        l2_300: l2-cache {
                                compatible = "cache";
@@ -1235,18 +1240,28 @@
                        thermal-sensors = <&tsens 14>;
 
                        trips {
-                               cpu-critical {
+                               cpu0_crit: cpu-critical {
                                        temperature = <120000>;
                                        hysteresis = <9000>;
                                        type = "critical";
                                };
 
-                               cpu-passive {
+                               cpu0_alert: cpu-passive {
                                        temperature = <110000>;
                                        hysteresis = <9000>;
                                        type = "passive";
                                };
                        };
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu0_alert>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
                };
 
                cpu1-thermal {
@@ -1254,18 +1269,28 @@
                        thermal-sensors = <&tsens 12>;
 
                        trips {
-                               cpu-critical {
+                               cpu1_crit: cpu-critical {
                                        temperature = <120000>;
                                        hysteresis = <9000>;
                                        type = "critical";
                                };
 
-                               cpu-passive {
+                               cpu1_alert: cpu-passive {
                                        temperature = <110000>;
                                        hysteresis = <9000>;
                                        type = "passive";
                                };
                        };
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu1_alert>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
                };
 
                cpu2-thermal {
@@ -1273,18 +1298,28 @@
                        thermal-sensors = <&tsens 11>;
 
                        trips {
-                               cpu-critical {
+                               cpu2_crit: cpu-critical {
                                        temperature = <120000>;
                                        hysteresis = <9000>;
                                        type = "critical";
                                };
 
-                               cpu-passive {
+                               cpu2_alert: cpu-passive {
                                        temperature = <110000>;
                                        hysteresis = <9000>;
                                        type = "passive";
                                };
                        };
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu2_alert>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
                };
 
                cpu3-thermal {
@@ -1292,18 +1327,28 @@
                        thermal-sensors = <&tsens 13>;
 
                        trips {
-                               cpu-critical {
+                               cpu3_crit: cpu-critical {
                                        temperature = <120000>;
                                        hysteresis = <9000>;
                                        type = "critical";
                                };
 
-                               cpu-passive {
+                               cpu3_alert: cpu-passive {
                                        temperature = <110000>;
                                        hysteresis = <9000>;
                                        type = "passive";
                                };
                        };
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu3_alert>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
                };
 
                wcss-tile2-thermal {