if (epartIsReg(modrm)) {
assign(t4, getIReg(2, eregOfRM(modrm)));
- lane = insn[3];
delta += 2+2;
+ lane = insn[2+2-1];
DIP("pinsrw $%d,%s,%s\n", (Int)lane,
nameIReg(2,eregOfRM(modrm)),
nameMMXReg(gregOfRM(modrm)));
} else {
- /* awaiting test case */
- goto decode_failure;
+ addr = disAMode ( &alen, sorb, delta+2, dis_buf );
+ delta += 3+alen;
+ lane = insn[3+alen-1];
+ assign(t4, loadLE(Ity_I16, mkexpr(addr)));
+ DIP("pinsrw $%d,%s,%s\n", (Int)lane,
+ dis_buf,
+ nameMMXReg(gregOfRM(modrm)));
}
switch (lane & 3) {