arm64: dts: ti: k3-am62p5-sk: Add bootph-all property to enable Ethernet boot

Ethernet boot requires CPSW nodes to be present starting from R5 SPL
stage. Add bootph-all property to required nodes to enable Ethernet boot
for AM62P5-SK.

Reviewed-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Link: https://lore.kernel.org/r/20250709105326.232608-3-c-vankar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index 83c37de7d338dbf10a16017834e69b37b5d41987..899da7896563b43021de14eda1b0058a5c6d36da 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -214,6 +214,14 @@
        };
 };
 
+&cpsw_mac_syscon {
+       bootph-all;
+};
+
+&phy_gmii_sel {
+       bootph-all;
+};
+
 &main_gpio0 {
        bootph-all;
 };
@@ -267,6 +275,7 @@
                        AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */
                        AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */
                >;
+               bootph-all;
        };
 
        main_mmc1_pins_default: main-mmc1-default-pins {
@@ -547,6 +556,7 @@
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy0>;
        status = "okay";
+       bootph-all;
 };
 
 &cpsw_port2 {
@@ -562,6 +572,7 @@
 
        cpsw3g_phy0: ethernet-phy@0 {
                reg = <0>;
+               bootph-all;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
                ti,min-output-impedance;