writel(val, usb2_base + USB2_LINECTRL1);
}
-static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
+static void rcar_gen3_phy_usb2_set_vbus(struct rcar_gen3_chan *ch,
+ u32 vbus_ctrl_reg,
+ u32 vbus_ctrl_val,
+ bool enable)
{
void __iomem *usb2_base = ch->base;
- u32 vbus_ctrl_reg = USB2_ADPCTRL;
- u32 vbus_ctrl_val = USB2_ADPCTRL_DRVVBUS;
u32 val;
+ val = readl(usb2_base + vbus_ctrl_reg);
+ if (enable)
+ val |= vbus_ctrl_val;
+ else
+ val &= ~vbus_ctrl_val;
+ writel(val, usb2_base + vbus_ctrl_reg);
+
+ dev_vdbg(ch->dev, "%s: reg=0x%08x, val=%08x, enable=%d\n",
+ __func__, vbus_ctrl_reg, val, enable);
+}
+
+static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
+{
if (ch->phy_data->no_adp_ctrl || ch->phy_data->vblvl_ctrl) {
if (ch->vbus)
regulator_hardware_enable(ch->vbus, vbus);
- vbus_ctrl_reg = USB2_VBCTRL;
- vbus_ctrl_val = USB2_VBCTRL_VBOUT;
+ rcar_gen3_phy_usb2_set_vbus(ch, USB2_VBCTRL,
+ USB2_VBCTRL_VBOUT, vbus);
+ return;
}
- val = readl(usb2_base + vbus_ctrl_reg);
- if (vbus)
- val |= vbus_ctrl_val;
- else
- val &= ~vbus_ctrl_val;
- dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
- writel(val, usb2_base + vbus_ctrl_reg);
+ rcar_gen3_phy_usb2_set_vbus(ch, USB2_ADPCTRL,
+ USB2_ADPCTRL_DRVVBUS, vbus);
}
static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)