Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 40dde4b7cf75b7b69cb3c65c181ed53281af0d5b..65eeec81b0f396bdfbf82c9b2ab315c76ddd0773 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2024-07-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+       Backported from master:
+       2024-07-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+       PR target/115611
+       * config/arm/mve.md (mve_vec_setv2di_internal): Fix printing of input
+       scalar register pair when lane = 1.
+
 2024-07-10  Uros Bizjak  <ubizjak@gmail.com>
 
        Backported from master:

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index d8524ff6036a7825f3f8ddb57667e3ce3696e920..93ea1dc1b26621b17b7b5bb3116792a878c5bc29 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240711
+20240712

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 97e6e8bc00da75a02e793131db39d9b045d7c82d..36a833778249ad398b435a64f4d3fdd6699ff574 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2024-07-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+       Backported from master:
+       2024-07-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+       * gcc.target/arm/mve/intrinsics/vsetq_lane_su64.c: New test.
+
 2024-07-05  Georg-Johann Lay  <avr@gjlay.de>
 
        Backported from master: