]> git.ipfire.org Git - thirdparty/vectorscan.git/commitdiff
DFA: use sherman economically
authorHong, Yang A <yang.a.hong@intel.com>
Thu, 18 Jun 2020 09:48:52 +0000 (09:48 +0000)
committerKonstantinos Margaritis <markos@users.noreply.github.com>
Mon, 25 Jan 2021 12:13:13 +0000 (14:13 +0200)
src/nfa/mcclellancompile.cpp
src/nfa/mcsheng_compile.cpp

index c1a4f87fc026db807529bad6a6d603c93d17e643..27ec1716e945b096ff526142de760d2454463780 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2018, Intel Corporation
+ * Copyright (c) 2015-2020, Intel Corporation
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -1477,6 +1477,7 @@ bytecode_ptr<NFA> mcclellanCompile_i(raw_dfa &raw, accel_dfa_build_strat &strat,
 
     bytecode_ptr<NFA> nfa;
     if (!using8bit) {
+        // Wide state optimization
         if (cc.grey.allowWideStates && strat.getType() == McClellan
             && !is_triggered(raw.kind)) {
             find_wide_state(info);
@@ -1486,19 +1487,22 @@ bytecode_ptr<NFA> mcclellanCompile_i(raw_dfa &raw, accel_dfa_build_strat &strat,
         bool any_cyclic_near_anchored_state
             = is_cyclic_near(raw, raw.start_anchored);
 
-        for (u32 i = 0; i < info.size(); i++) {
-            if (info.is_widestate(i)) {
-                continue;
+        // Sherman optimization
+        if (info.impl_alpha_size > 16) {
+            for (u32 i = 0; i < info.size(); i++) {
+                if (info.is_widestate(i)) {
+                    continue;
+                }
+                find_better_daddy(info, i, using8bit,
+                                  any_cyclic_near_anchored_state,
+                                  trust_daddy_states, cc.grey);
+                total_daddy += info.extra[i].daddytaken;
             }
-            find_better_daddy(info, i, using8bit,
-                              any_cyclic_near_anchored_state,
-                              trust_daddy_states, cc.grey);
-            total_daddy += info.extra[i].daddytaken;
-        }
 
-        DEBUG_PRINTF("daddy %hu/%zu states=%zu alpha=%hu\n", total_daddy,
-                     info.size() * info.impl_alpha_size, info.size(),
-                     info.impl_alpha_size);
+            DEBUG_PRINTF("daddy %hu/%zu states=%zu alpha=%hu\n", total_daddy,
+                         info.size() * info.impl_alpha_size, info.size(),
+                         info.impl_alpha_size);
+        }
 
         nfa = mcclellanCompile16(info, cc, accel_states);
     } else {
index 871ca4fb17b229b739f4d5b602af2375f56b62e1..5277c54e5b00a94ed2b578b1242ab7eb91149e38 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, Intel Corporation
+ * Copyright (c) 2016-2020, Intel Corporation
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -842,17 +842,20 @@ bytecode_ptr<NFA> mcshengCompile16(dfa_info &info, dstate_id_t sheng_end,
 
     assert(info.getAlphaShift() <= 8);
 
-    u16 total_daddy = 0;
-    for (u32 i = 0; i < info.size(); i++) {
-        find_better_daddy(info, i,
-                          is_cyclic_near(info.raw, info.raw.start_anchored),
-                          grey);
-        total_daddy += info.extra[i].daddytaken;
-    }
+    // Sherman optimization
+    if (info.impl_alpha_size > 16) {
+        u16 total_daddy = 0;
+        for (u32 i = 0; i < info.size(); i++) {
+            find_better_daddy(info, i,
+                              is_cyclic_near(info.raw, info.raw.start_anchored),
+                              grey);
+            total_daddy += info.extra[i].daddytaken;
+        }
 
-    DEBUG_PRINTF("daddy %hu/%zu states=%zu alpha=%hu\n", total_daddy,
-                 info.size() * info.impl_alpha_size, info.size(),
-                 info.impl_alpha_size);
+        DEBUG_PRINTF("daddy %hu/%zu states=%zu alpha=%hu\n", total_daddy,
+                     info.size() * info.impl_alpha_size, info.size(),
+                     info.impl_alpha_size);
+    }
 
     u16 sherman_limit;
     if (!allocateImplId16(info, sheng_end, &sherman_limit)) {