drm/amd/display: restore invalid MSA timing check for freesync

commit 7f2b5237e313e39008a85b33ca94ab503a8fdff9 upstream.

This restores the original behavior that gets min/max freq from EDID and
only set DP/eDP connector as freesync capable if "sink device is capable
of rendering incoming video stream without MSA timing parameters", i.e.,
`allow_invalid_MSA_timing_params` is true. The condition was mistakenly
removed by 0159f88a99c9 ("drm/amd/display: remove redundant freesync
parser for DP").

CC: Mario Limonciello <mario.limonciello@amd.com>
CC: Alex Hung <alex.hung@amd.com>
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3915
Fixes: 0159f88a99c9 ("drm/amd/display: remove redundant freesync parser for DP")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 5f216d626cbb57536258383640bbca1515a9f70c..53694baca96637fded38530e749ed28fa9e91938 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -12227,10 +12227,14 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 
        if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT ||
                     sink->sink_signal == SIGNAL_TYPE_EDP)) {
-               amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq;
-               amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq;
-               if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10)
-                       freesync_capable = true;
+               if (amdgpu_dm_connector->dc_link &&
+                   amdgpu_dm_connector->dc_link->dpcd_caps.allow_invalid_MSA_timing_param) {
+                       amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq;
+                       amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq;
+                       if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10)
+                               freesync_capable = true;
+               }
+
                parse_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
 
                if (vsdb_info.replay_mode) {