]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
KVM: arm64: Handle FEAT_IDST for sysregs without specific handlers
authorMarc Zyngier <maz@kernel.org>
Thu, 8 Jan 2026 17:32:28 +0000 (17:32 +0000)
committerMarc Zyngier <maz@kernel.org>
Thu, 15 Jan 2026 11:58:57 +0000 (11:58 +0000)
Add a bit of infrastrtcture to triage_sysreg_trap() to handle the
case of registers falling into the Feature ID space that do not
have a local handler.

For these, we can directly apply the FEAT_IDST semantics and inject
an EC=0x18 exception. Otherwise, an UNDEF will do.

Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Yuan Yao <yaoyuan@linux.alibaba.com>
Link: https://patch.msgid.link/20260108173233.2911955-5-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
arch/arm64/kvm/emulate-nested.c
arch/arm64/kvm/sys_regs.h

index 616eb6ad68701a9511288206679a6ee49cb88eea..4aabd624c4be5ab1beca62fba77fe8ff91979b1f 100644 (file)
@@ -2588,6 +2588,19 @@ local:
 
                params = esr_sys64_to_params(esr);
 
+               /*
+                * This implements the pseudocode UnimplementedIDRegister()
+                * helper for the purpose of dealing with FEAT_IDST.
+                */
+               if (in_feat_id_space(&params)) {
+                       if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR2_EL1, IDS, IMP))
+                               kvm_inject_sync(vcpu, kvm_vcpu_get_esr(vcpu));
+                       else
+                               kvm_inject_undefined(vcpu);
+
+                       return true;
+               }
+
                /*
                 * Check for the IMPDEF range, as per DDI0487 J.a,
                 * D18.3.2 Reserved encodings for IMPLEMENTATION
index b3f904472fac563e904579c9befd3469b368849c..2a983664220ce0b1ce03228f70c65cca0bbb3b30 100644 (file)
@@ -49,6 +49,16 @@ struct sys_reg_params {
                                  .Op2 = ((esr) >> 17) & 0x7,                   \
                                  .is_write = !((esr) & 1) })
 
+/*
+ * The Feature ID space is defined as the System register space in AArch64
+ * with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7}, op2=={0-7}.
+ */
+static inline bool in_feat_id_space(struct sys_reg_params *p)
+{
+       return (p->Op0 == 3 && !(p->Op1 & 0b100) && p->Op1 != 2 &&
+               p->CRn == 0 && !(p->CRm & 0b1000));
+}
+
 struct sys_reg_desc {
        /* Sysreg string for debug */
        const char *name;