--- /dev/null
+/dts-v1/;
+
+#include "ipq5018.dtsi"
+#include "ipq5018-ess.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "Xiaomi AX6000";
+ compatible = "xiaomi,ax6000", "qcom,ipq5018";
+
+ aliases {
+ label-mac-device = &dp1;
+ led-boot = &led_system_blue;
+ led-failsafe = &led_system_yellow;
+ led-running = &led_system_blue;
+ led-upgrade = &led_system_yellow;
+ serial0 = &blsp1_uart1;
+ };
+
+ chosen {
+ /* Xiaomi's U-boot sets bootargs to:
+ * ubi.mtd=rootfs_1 root=mtd:ubi_rootfs rootfstype=squashfs rootwait uart_en=1
+ * so we need to override and set ubi.mtd=rootfs
+ */
+ bootargs-append = " ubi.mtd=rootfs root=/dev/ubiblock0_0 coherent_pool=2M";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ pinctrl-0 = <&button_pins>;
+ pinctrl-names = "default";
+
+ reset-button {
+ label = "reset";
+ gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pinctrl-0 = <&leds_pins>;
+ pinctrl-names = "default";
+
+ led_wlan_green: wlan-green {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_WLAN;
+ gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_system_blue: system-blue {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_POWER;
+ gpio = <&tlmm 24 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_system_yellow: system-yellow {
+ color = <LED_COLOR_ID_YELLOW>;
+ function = LED_FUNCTION_POWER;
+ gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_net_blue: net-blue {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_WAN_ONLINE;
+ gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_net_yellow: net-yellow {
+ color = <LED_COLOR_ID_YELLOW>;
+ function = LED_FUNCTION_WAN;
+ gpio = <&tlmm 27 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_phy_green: phy-green {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ gpio = <&tlmm 28 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reserved-memory {
+ q6_mem_regions: q6_mem_regions@4b000000 {
+ no-map;
+ reg = <0x0 0x4b000000 0x0 0x3000000>;
+ };
+ };
+};
+
+&sleep_clk {
+ clock-frequency = <32000>;
+};
+
+&xo_board_clk {
+ clock-frequency = <24000000>;
+};
+
+&blsp1_uart1 {
+ status = "okay";
+
+ pinctrl-0 = <&serial_0_pins>;
+ pinctrl-names = "default";
+};
+
+&crypto {
+ status = "okay";
+};
+
+&cryptobam {
+ status = "okay";
+};
+
+&prng {
+ status = "okay";
+};
+
+&qfprom {
+ status = "okay";
+};
+
+&qpic_bam {
+ status = "okay";
+};
+
+&qpic_nand {
+ pinctrl-0 = <&qpic_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ nand-ecc-engine = <&qpic_nand>;
+ nand-bus-width = <8>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "0:sbl1";
+ reg = <0x00000000 0x80000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "0:mibib";
+ reg = <0x00080000 0x80000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "0:bootconfig";
+ reg = <0x00100000 0x40000>;
+ read-only;
+ };
+
+ partition@140000 {
+ label = "0:bootconfig1";
+ reg = <0x00140000 0x40000>;
+ read-only;
+ };
+
+ partition@180000 {
+ label = "0:qsee";
+ reg = <0x00180000 0x100000>;
+ read-only;
+ };
+
+ partition@280000 {
+ label = "0:qsee_1";
+ reg = <0x00280000 0x100000>;
+ read-only;
+ };
+
+ partition@380000 {
+ label = "0:devcfg";
+ reg = <0x00380000 0x40000>;
+ read-only;
+ };
+
+ partition@3c0000 {
+ label = "0:devcfg_1";
+ reg = <0x003c0000 0x40000>;
+ read-only;
+ };
+
+ partition@400000 {
+ label = "0:cdt";
+ reg = <0x00400000 0x40000>;
+ read-only;
+ };
+
+ partition@440000 {
+ label = "0:cdt_1`";
+ reg = <0x00440000 0x40000>;
+ read-only;
+ };
+
+ partition@480000 {
+ label = "0:appsblenv";
+ reg = <0x00480000 0x80000>;
+ };
+
+ partition@500000 {
+ label = "0:appsbl";
+ reg = <0x00500000 0x140000>;
+ read-only;
+ };
+
+ partition@640000 {
+ label = "0:appsbl_1";
+ reg = <0x00640000 0x140000>;
+ read-only;
+ };
+
+ partition@780000 {
+ label = "0:art";
+ reg = <0x00780000 0x100000>;
+ read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_addr_dp1: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
+
+ mac_addr_dp2: macaddr@6 {
+ reg = <0x6 0x6>;
+ };
+
+ caldata_qca9889: caldata@4d000 {
+ reg = <0x4d000 0x844>;
+ };
+ };
+ };
+
+ partition@880000 {
+ label = "0:training";
+ reg = <0x00880000 0x80000>;
+ read-only;
+ };
+
+ partition@900000 {
+ label = "bdata";
+ reg = <0x00900000 0x80000>;
+ };
+
+ partition@980000 {
+ label = "crash";
+ reg = <0x00980000 0x80000>;
+ };
+
+ partition@a00000 {
+ label = "crash_syslog";
+ reg = <0x00a00000 0x80000>;
+ };
+
+ partition@a80000 {
+ label = "ubi_kernel";
+ reg = <0x00a80000 0x2400000>;
+ };
+
+ partition@2e80000 {
+ label = "rootfs";
+ reg = <0x02e80000 0x5180000>;
+ };
+ };
+ };
+};
+
+/*
+* =================================================================
+* _______________________ _______________________
+* | IPQ5018 | | QCA8337 |
+* | +------+ +--------+ | | +--------+ +------+ |
+* | | MAC0 |---| GE Phy |-+--- MDI ---+ | Phy3 |---| MAC4 | |
+* | +------+ +--------+ | | +--------+ +------+ |
+* | | |_______________________|
+* | | _______________________
+* | | | QCA8081 |
+* | +------+ +--------+ | | +-------------------+ |
+* | | MAC1 |---| Uniphy |-+-- SGMII+--+ | Phy | |
+* | +------+ +--------+ | | +-------------------+ |
+* |_______________________| |_______________________|
+*
+* =================================================================
+*/
+
+&switch {
+ status = "okay";
+
+ switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
+
+ qcom,port_phyinfo {
+ // MAC0 -> GE Phy --- MDI --- QCA8337 Switch
+ port@0 {
+ port_id = <1>;
+ mdiobus = <&mdio0>;
+ phy_address = <7>;
+ phy_dac = <0x10 0x10>;
+ };
+
+ // MAC1 -> Uniphy --- SGMII --- QCA8081
+ port@1 {
+ port_id = <2>;
+ mdiobus = <&mdio1>;
+ phy_address = <8>;
+ port_mac_sel = "QGMAC_PORT";
+ };
+ };
+};
+
+// MAC0 -> GE Phy
+&dp1 {
+ status = "okay";
+
+ nvmem-cells = <&mac_addr_dp1 0>;
+ nvmem-cell-names = "mac-address";
+};
+
+// MAC1 ---SGMII---> QCA8081
+&dp2 {
+ status = "okay";
+
+ label = "wan";
+ phy-handle = <&qca8081>;
+ nvmem-cells = <&mac_addr_dp2 0>;
+ nvmem-cell-names = "mac-address";
+};
+
+&mdio0 {
+ status = "okay";
+};
+
+// IPQ5018 GE Phy -> QCA8337 PHY0
+&ge_phy {
+ qcom,dac-preset-short-cable;
+};
+
+&mdio1 {
+ status = "okay";
+
+ pinctrl-0 = <&mdio1_pins>;
+ pinctrl-names = "default";
+ reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
+
+ // QCA8337 Phy0 -> LAN1
+ qca8337_0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ // QCA8337 Phy1 -> LAN2
+ qca8337_1: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ // QCA8337 Phy2 -> LAN3
+ qca8337_2: ethernet-phy@2 {
+ reg = <2>;
+ };
+
+ // QCA8337 Phy3 -> IPQ5018 GE Phy
+ qca8337_3: ethernet-phy@3 {
+ reg = <3>;
+ };
+
+ // QCA8081 Phy -> WAN
+ qca8081: ethernet-phy@8 {
+ compatible = "ethernet-phy-id004d.d101";
+ reg = <8>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_WAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ // QCA8337 switch
+ ethernet-switch@11 {
+ compatible = "qca,qca8337";
+ reg = <17>;
+
+ ports {
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ phy-handle = <&qca8337_0>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-handle = <&qca8337_1>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ phy-handle = <&qca8337_2>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ phy-handle = <&qca8337_3>;
+ phy-mode = "gmii";
+ ethernet = <&dp1>;
+ };
+ };
+ };
+};
+
+&tlmm {
+ button_pins: button-state {
+ pins = "gpio38";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ leds_pins: leds-state {
+ pins = "gpio23", "gpio24", "gpio25",
+ "gpio26", "gpio27", "gpio28";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ mdio1_pins: mdio-state {
+ mdc-pins {
+ pins = "gpio36";
+ function = "mdc";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ mdio-pins {
+ pins = "gpio37";
+ function = "mdio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+
+ qpic_pins: qpic-state {
+ clock-pins {
+ pins = "gpio9";
+ function = "qspi_clk";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ cs-pins {
+ pins = "gpio8";
+ function = "qspi_cs";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio4", "gpio5", "gpio6", "gpio7";
+ function = "qspi_data";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ serial_0_pins: uart0-state {
+ pins = "gpio20", "gpio21";
+ function = "blsp0_uart0";
+ bias-disable;
+ };
+};
+
+&tsens {
+ status = "okay";
+};
+
+&pcie0_phy {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+
+ perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>;
+
+ pcie@0 {
+ wifi@0,0 {
+ status = "okay";
+
+ /* QCN9074: ath11k lacks DT compatible for PCI cards */
+ compatible = "pci17cb,1104";
+ reg = <0x00010000 0 0 0 0>;
+
+ qcom,ath11k-calibration-variant = "Xiaomi-AX6000";
+ };
+ };
+};
+
+&pcie1_phy {
+ status = "okay";
+};
+
+&pcie1 {
+ /*
+ * although the pcie1 phy probes successfully, the controller is unable
+ * to bring it up. So let's disable it until a solution is found.
+ */
+ status = "disbled";
+
+ perst-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+
+ pcie@0 {
+ wifi@0,0 {
+ status = "okay";
+
+ compatible = "qcom,ath10k";
+ reg = <0x00010000 0 0 0 0>;
+
+ qcom,ath10k-calibration-variant = "Xiaomi-AX6000";
+ nvmem-cell-names = "calibration";
+ nvmem-cells = <&caldata_qca9889>;
+ };
+ };
+};
+
+&q6v5_wcss {
+ status = "okay";
+
+ memory-region = <&q6_mem_regions>;
+ firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt",
+ "ath11k/IPQ5018/hw1.0/m3_fw.mdt";
+
+ // IPQ5018
+ q6_wcss_pd1: pd-1 {
+ firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
+
+ resets =
+ <&gcc GCC_WCSSAON_RESET>,
+ <&gcc GCC_WCSS_BCR>,
+ <&gcc GCC_CE_BCR>;
+ reset-names =
+ "wcss_aon_reset",
+ "wcss_reset",
+ "ce_reset";
+
+ clocks =
+ <&gcc GCC_WCSS_AHB_S_CLK>,
+ <&gcc GCC_WCSS_ACMT_CLK>,
+ <&gcc GCC_WCSS_AXI_M_CLK>;
+ clock-names =
+ "gcc_wcss_ahb_s_clk",
+ "gcc_wcss_acmt_clk",
+ "gcc_wcss_axi_m_clk";
+
+ interrupts-extended =
+ <&wcss_smp2p_in 8 0>,
+ <&wcss_smp2p_in 9 0>,
+ <&wcss_smp2p_in 12 0>,
+ <&wcss_smp2p_in 11 0>;
+ interrupt-names =
+ "fatal",
+ "ready",
+ "spawn-ack",
+ "stop-ack";
+
+ qcom,smem-states =
+ <&wcss_smp2p_out 8>,
+ <&wcss_smp2p_out 9>,
+ <&wcss_smp2p_out 10>;
+ qcom,smem-state-names =
+ "shutdown",
+ "stop",
+ "spawn";
+ };
+};
+
+&wifi0 {
+ status = "okay";
+
+ qcom,rproc = <&q6_wcss_pd1>;
+ qcom,ath11k-calibration-variant = "Xiaomi-AX6000";
+ qcom,ath11k-fw-memory-mode = <1>;
+ qcom,bdf-addr = <0x4c400000>;
+};
projects / thirdparty / openwrt.git / commitdiff
