return DISPLAY_MMIO_BASE(display);
}
EXPORT_SYMBOL_NS_GPL(intel_display_device_mmio_base, "I915_GVT");
+
+bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe)
+{
+ if (pipe < PIPE_A || pipe >= I915_MAX_PIPES)
+ return false;
+
+ return DISPLAY_RUNTIME_INFO(display)->pipe_mask & BIT(pipe);
+}
+EXPORT_SYMBOL_NS_GPL(intel_display_device_pipe_valid, "I915_GVT");
u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
u32 intel_display_device_mmio_base(struct intel_display *display);
+bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe);
#endif /* __INTEL_GVT_API_H__ */
{
struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
struct intel_display *display = dev_priv->display;
- int pipe;
+ enum pipe pipe;
if (IS_BROXTON(dev_priv)) {
enum transcoder trans;
GEN8_DE_PORT_HOTPLUG(HPD_PORT_B) |
GEN8_DE_PORT_HOTPLUG(HPD_PORT_C));
- for_each_pipe(display, pipe) {
+ gvt_for_each_pipe(display, pipe) {
vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) &=
~(TRANSCONF_ENABLE | TRANSCONF_STATE_ENABLE);
vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK;
/* Disable Primary/Sprite/Cursor plane */
- for_each_pipe(display, pipe) {
+ gvt_for_each_pipe(display, pipe) {
vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
vgpu_vreg_t(vgpu, CURCNTR(display, pipe)) &= ~MCURSOR_MODE_MASK;
{
struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
struct intel_display *display = i915->display;
- int pipe;
+ enum pipe pipe;
mutex_lock(&vgpu->vgpu_lock);
- for_each_pipe(display, pipe)
+ gvt_for_each_pipe(display, pipe)
emulate_vblank_on_pipe(vgpu, pipe);
mutex_unlock(&vgpu->vgpu_lock);
}
#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
intel_display_device_cursor_offset((display), (pipe))
+#define gvt_for_each_pipe(display, __p) \
+ for ((__p) = PIPE_A; (__p) < I915_MAX_PIPES; (__p)++) \
+ for_each_if(intel_display_device_pipe_valid((display), (__p)))
+
#endif /* __DISPLAY_HELPERS_H__ */