Some DMA controllers require transfer lengths to be aligned to a
specific boundary. For example, the Tegra GPC DMA requires 4-byte
(word) aligned transfers and will reject unaligned lengths.
Align the TX DMA buffer length down to the DMA controller's copy_align
boundary before submitting the transfer. Any remaining unaligned bytes
will be transmitted via PIO on subsequent calls, which is the existing
fallback behavior when DMA is not used.
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Link: https://patch.msgid.link/20260225065915.341522-5-kkartik@nvidia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
count = PL011_DMA_BUFFER_SIZE;
count = kfifo_out_peek(&tport->xmit_fifo, dmatx->buf, count);
+
+ /*
+ * Align the TX buffer length to the DMA controller's copy_align
+ * requirements. Some DMA controllers (e.g., Tegra GPC DMA) require
+ * word-aligned transfers. Unaligned bytes will be sent via PIO.
+ */
+ if (chan->device->copy_align)
+ count = ALIGN_DOWN(count, 1 << chan->device->copy_align);
+
dmatx->len = count;
dmatx->dma = dma_map_single(dma_dev->dev, dmatx->buf, count,
DMA_TO_DEVICE);