drm/xe/pt: check no-DMA huge-pte cases before DMA segment test

On a non-range clear, curs.size is never set, so the segment test
(next - va_curs_start > curs->size) returns false for every level > 0
before the clear_pt short-circuit is reached. The clear then descends to
level 0 instead of forming a huge zero-leaf, wasting page tables and
risking -ENOMEM on unbind.

Move the null-VMA, purged-BO and clear_pt short-circuits above the
curs->size test. The bind path always sets curs.size, so it is unaffected.

v2
- Also set curs.size on the clear path so the cursor stays meaningful
during the walk. clear_pt is only reached with range == NULL, so assert
that invariant. (Matthew Brost)

Cc: Matthew Brost <matthew.brost@intel.com>
Fixes: 5b658b7e89c3 ("drm/xe: Clear scratch page on vm_bind")
Reported-by: Sashiko <sashiko-bot@kernel.org>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20260728055916.593707-2-himal.prasad.ghimiray@intel.com
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
(cherry picked from commit 04eeeb45cb61b8a3e9d785003457e550c920ba49)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 39c9c8f0ea2d20b19d2cb5925d1b167dc0411434..d0a1e6c2b55fc80a46d57cbfe98e717b5f9e1c1f 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -443,10 +443,6 @@ static bool xe_pt_hugepte_possible(u64 addr, u64 next, unsigned int level,
        if (!xe_pt_covers(addr, next, level, &xe_walk->base))
                return false;
 
-       /* Does the DMA segment cover the whole pte? */
-       if (next - xe_walk->va_curs_start > xe_walk->curs->size)
-               return false;
-
        /* null VMA's and purged BO's do not have dma addresses */
        if (xe_vma_is_null(xe_walk->vma) || (bo && xe_bo_is_purged(bo)))
                return true;
@@ -455,6 +451,10 @@ static bool xe_pt_hugepte_possible(u64 addr, u64 next, unsigned int level,
        if (xe_walk->clear_pt)
                return true;
 
+       /* Does the DMA segment cover the whole pte? */
+       if (next - xe_walk->va_curs_start > xe_walk->curs->size)
+               return false;
+
        /* Is the DMA address huge PTE size aligned? */
        size = next - addr;
        dma = addr - xe_walk->va_curs_start + xe_res_dma(xe_walk->curs);
@@ -775,8 +775,11 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
        }
 
        xe_walk.needs_64K = (vm->flags & XE_VM_FLAG_64K);
-       if (clear_pt)
+       if (clear_pt) {
+               xe_assert(xe, !range);
+               curs.size = xe_vma_size(vma);
                goto walk_pt;
+       }
 
        if (vma->gpuva.flags & XE_VMA_ATOMIC_PTE_BIT) {
                xe_walk.default_vram_pte = xe_atomic_for_vram(vm, vma) ? XE_USM_PPGTT_PTE_AE : 0;