arm/97903: Missed optimization in lowering test operation.

gcc/ChangeLog:

2021-05-05  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	* config/arm/neon.md (neon_vtst_combine<mode>): New pattern.
	* config/arm/predicates.md (minus_one_operand): New predicate.

diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index fec2cc91d24b6eff7b6fc8fdd54f39b3d646c468..2a1e304f2baa0bf9f45b73fb645097b76bee3fda 100644 (file)
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -2588,6 +2588,19 @@
   [(set_attr "type" "neon_tst<q>")]
 )
 
+(define_insn "neon_vtst_combine<mode>"
+  [(set (match_operand:VDQIW 0 "s_register_operand" "=w")
+        (plus:VDQIW
+         (eq:VDQIW
+           (and:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w")
+                      (match_operand:VDQIW 2 "s_register_operand" "w"))
+           (match_operand:VDQIW 3 "zero_operand" "i"))
+         (match_operand:VDQIW 4 "minus_one_operand" "i")))]
+  "TARGET_NEON"
+  "vtst.<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+  [(set_attr "type" "neon_tst<q>")]
+)
+
 (define_insn "neon_vabd<sup><mode>"
   [(set (match_operand:VDQIW 0 "s_register_operand" "=w")
         (unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")

diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md
index c661f015fc556b5e9cdc64d0a0db583b8cfd4edd..9db061dc88c1d54a99efce4438acaf228cfacecb 100644 (file)
--- a/gcc/config/arm/predicates.md
+++ b/gcc/config/arm/predicates.md
@@ -200,6 +200,10 @@
   (and (match_code "const_int,const_double,const_vector")
        (match_test "op == CONST0_RTX (mode)")))
 
+(define_predicate "minus_one_operand"
+  (and (match_code "const_int,const_double,const_vector")
+       (match_test "op == CONSTM1_RTX (mode)")))
+
 ;; Match a register, or zero in the appropriate mode.
 (define_predicate "reg_or_zero_operand"
   (ior (match_operand 0 "s_register_operand")