irqchip/loongarch-avec: Adjust irqchip driver for 32BIT/64BIT

csr_read64() is only available on 64BIT LoongArch platform, so use the
recently added adaptive csr_read() instead to make the driver work on both
32BIT and 64BIT platforms.

This makes avecintc_enable() a no-op for 32-bit as it is only required on
64-bit systems.

Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Link: https://patch.msgid.link/20260113085940.3344837-2-chenhuacai@loongson.cn

diff --git a/drivers/irqchip/irq-loongarch-avec.c b/drivers/irqchip/irq-loongarch-avec.c
index ba556c008cf32dfe349d0dea5bc1cbf74a570035..fb8efde9539369f81f51354915f6f6f77a99288d 100644 (file)
--- a/drivers/irqchip/irq-loongarch-avec.c
+++ b/drivers/irqchip/irq-loongarch-avec.c
@@ -58,11 +58,13 @@ struct avecintc_data {
 
 static inline void avecintc_enable(void)
 {
+#ifdef CONFIG_MACH_LOONGSON64
        u64 value;
 
        value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
        value |= IOCSR_MISC_FUNC_AVEC_EN;
        iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);
+#endif
 }
 
 static inline void avecintc_ack_irq(struct irq_data *d)
@@ -167,7 +169,7 @@ void complete_irq_moving(void)
        struct pending_list *plist = this_cpu_ptr(&pending_list);
        struct avecintc_data *adata, *tdata;
        int cpu, vector, bias;
-       uint64_t isr;
+       unsigned long isr;
 
        guard(raw_spinlock)(&loongarch_avec.lock);
 
@@ -177,16 +179,16 @@ void complete_irq_moving(void)
                bias = vector / VECTORS_PER_REG;
                switch (bias) {
                case 0:
-                       isr = csr_read64(LOONGARCH_CSR_ISR0);
+                       isr = csr_read(LOONGARCH_CSR_ISR0);
                        break;
                case 1:
-                       isr = csr_read64(LOONGARCH_CSR_ISR1);
+                       isr = csr_read(LOONGARCH_CSR_ISR1);
                        break;
                case 2:
-                       isr = csr_read64(LOONGARCH_CSR_ISR2);
+                       isr = csr_read(LOONGARCH_CSR_ISR2);
                        break;
                case 3:
-                       isr = csr_read64(LOONGARCH_CSR_ISR3);
+                       isr = csr_read(LOONGARCH_CSR_ISR3);
                        break;
                }
 
@@ -234,7 +236,7 @@ static void avecintc_irq_dispatch(struct irq_desc *desc)
        chained_irq_enter(chip, desc);
 
        while (true) {
-               unsigned long vector = csr_read64(LOONGARCH_CSR_IRR);
+               unsigned long vector = csr_read(LOONGARCH_CSR_IRR);
                if (vector & IRR_INVALID_MASK)
                        break;