aarch64: Add +lse128 architectural extension command-line flag

Given how, at present, the choice of using LSE128 atomic instructions
by the toolchain is delegated to run-time selection in the form of
Libatomic ifuncs, responsible for querying target support, the
`+lse128' target architecture compile-time flag is absent from GCC.

This, however, contrasts with the Binutils implementation, which gates
LSE128 instructions behind the `+lse128' flag.  This can lead to
problems in GCC for certain use-cases.  One such example is in the use
of inline assembly, whereby the inability of enabling the feature in
the command-line prevents the compiler from automatically issuing the
necessary LSE128 `.arch' directive.

This patch therefore brings GCC into alignment with LLVM and Binutils
in adding support for the `+lse128' architectural extension flag.

gcc/ChangeLog:

	* config/aarch64/aarch64-option-extensions.def: Add LSE128
	AARCH64_OPT_EXTENSION, adding it as a dependency for the D128
	feature.
	* doc/invoke.texi (AArch64 Options): Document +lse128.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/lse128-flag.c: New.
	* gcc.target/aarch64/cpunative/info_23: Likewise.
	* gcc.target/aarch64/cpunative/native_cpu_23.c: Likewise.

diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index 1a3b91c68cf8172a2fa63a30383f5f784277f728..ac54b899a06fbac08564aaf5da1edbc81cba90c8 100644 (file)
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -275,7 +275,9 @@ AARCH64_OPT_EXTENSION("mops", MOPS, (), (), (), "")
 
 AARCH64_OPT_EXTENSION("cssc", CSSC, (), (), (), "cssc")
 
-AARCH64_OPT_EXTENSION("d128", D128, (), (), (), "d128")
+AARCH64_OPT_EXTENSION("lse128", LSE128, (LSE), (), (), "lse128")
+
+AARCH64_OPT_EXTENSION("d128", D128, (LSE128), (), (), "d128")
 
 AARCH64_OPT_EXTENSION("the", THE, (), (), (), "the")
 

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d09074e13de46b54c2e17b7c6817a1589ef7096c..f6c8d6fc0e181c6b2875eed235fa4a609cf4611d 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21578,8 +21578,12 @@ Enable the FEAT_SME_I16I64 extension to SME.
 Enable the FEAT_SME_F64F64 extension to SME.
 +@item sme2
 Enable the Scalable Matrix Extension 2.  This also enables SME instructions.
+@item lse128
+Enable the LSE128 128-bit atomic instructions extension.  This also
+enables LSE instructions.
 @item d128
 Enable support for 128-bit system register read/write instructions.
+This also enables the LSE128 extension.
 @item gcs
 Enable support for Armv9.4-a Guarded Control Stack extension.
 @item the

diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_23 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_23
new file mode 100644 (file)
index 0000000..0ca69d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_23
@@ -0,0 +1,8 @@
+processor      : 0
+BogoMIPS       : 100.00
+Features       : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp atomics lse128
+CPU implementer        : 0xfe
+CPU architecture: 8
+CPU variant    : 0x0
+CPU part       : 0xd08
+CPU revision   : 2

diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_23.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_23.c
new file mode 100644 (file)
index 0000000..8a1e235
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_23.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_23" } */
+/* { dg-additional-options "-mcpu=native" } */
+
+int main()
+{
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod\+crc\+crypto\+lse128} } } */
+/* Test one where lse128 is available and so should be emitted.  */

diff --git a/gcc/testsuite/gcc.target/aarch64/lse128-flag.c b/gcc/testsuite/gcc.target/aarch64/lse128-flag.c
new file mode 100644 (file)
index 0000000..71339c3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/lse128-flag.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { aarch64*-*-*} } } */
+/* { dg-additional-options "-march=armv9.4-a+lse128" } */
+
+int main()
+{
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv9\.4-a\+crc\+lse128} } } */
+/* Test a normal looking procinfo.  */