]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
phy: airoha: Fix REG_CSR_2L_JCPLL_SDM_HREN config in airoha_pcie_phy_init_ssc_jcpll()
authorLorenzo Bianconi <lorenzo@kernel.org>
Wed, 18 Sep 2024 13:32:54 +0000 (15:32 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 5 Dec 2024 12:53:55 +0000 (13:53 +0100)
[ Upstream commit 6fd016c965d241673a2e62afbf9eeb4bcbfbbe45 ]

Fix typo configuring REG_CSR_2L_JCPLL_SDM_HREN register in
airoha_pcie_phy_init_ssc_jcpll routine.

Fixes: d7d2818b9383 ("phy: airoha: Add PCIe PHY driver for EN7581 SoC.")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20240918-airoha-en7581-phy-fixes-v1-3-8291729a87f8@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/phy/phy-airoha-pcie.c

index 3e5f49d9942a6b37d7b8aab2d70ddf1bb3a1ac94..9d222898760bc5282bc1c96dead783833a9a0cee 100644 (file)
@@ -799,7 +799,7 @@ static void airoha_pcie_phy_init_ssc_jcpll(struct airoha_pcie_phy *pcie_phy)
        airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SDM_IFM,
                                   CSR_2L_PXP_JCPLL_SDM_IFM);
        airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN,
-                                  REG_CSR_2L_JCPLL_SDM_HREN);
+                                  CSR_2L_PXP_JCPLL_SDM_HREN);
        airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_RST_DLY,
                                     CSR_2L_PXP_JCPLL_SDM_DI_EN);
        airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SSC,