RISC-V: Add MASK vec_duplicate pattern[PR110962]

This patch fix bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110962

SUBROUTINE a(b,c,d)
  LOGICAL,DIMENSION(INOUT)  :: b
  LOGICAL e
  REAL, DIMENSION(IN)     ::  c
  REAL, DIMENSION(INOUT)  ::  d
  REAL, DIMENSION(SIZE(c))   :: f
  WHERE (b.AND.e)
     WHERE (f>=0.)
        d = g
     ENDWHERE
  ENDWHERE
END SUBROUTINE a

   PR target/110962

gcc/ChangeLog:
	PR target/110962
	* config/riscv/autovec.md (vec_duplicate<mode>): New pattern.

diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
index 6cb5fa3ed2721aedea0fd6989d1dacd8f4edc46d..3b396a9a9904ef34475cab969c2aa1fde282cee1 100644 (file)
--- a/gcc/config/riscv/autovec.md
+++ b/gcc/config/riscv/autovec.md
@@ -287,6 +287,27 @@
 ;; == Vector creation
 ;; =========================================================================
 
+;; -------------------------------------------------------------------------
+;; ---- [BOOL] Duplicate element
+;; -------------------------------------------------------------------------
+;; The patterns in this section are synthetic.
+;; -------------------------------------------------------------------------
+
+;; Implement a predicate broadcast by shifting the low bit of the scalar
+;; input into the top bit by duplicate the input and do a compare with zero.
+(define_expand "vec_duplicate<mode>"
+  [(set (match_operand:VB 0 "register_operand")
+       (vec_duplicate:VB (match_operand:QI 1 "register_operand")))]
+  "TARGET_VECTOR"
+  {
+    poly_int64 nunits = GET_MODE_NUNITS (<MODE>mode);
+    machine_mode mode = riscv_vector::get_vector_mode (QImode, nunits).require ();
+    rtx dup = expand_vector_broadcast (mode, operands[1]);
+    riscv_vector::expand_vec_cmp (operands[0], NE, dup, CONST0_RTX (mode));
+    DONE;
+  }
+)
+
 ;; -------------------------------------------------------------------------
 ;; ---- [INT] Linear series
 ;; -------------------------------------------------------------------------