backport: re PR target/51835 (ARM EABI violation when passing arguments to helper...

	Backport from mainline.
	2012-01-30  Bin Cheng  <bin.cheng@arm.com>

	PR target/51835
	* config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI
	for __aeabi_d2iz/__aeabi_d2uiz with hard-float.

	2011-06-08  Julian Brown  <julian@codesourcery.com>

	* config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI
	for double-precision helper functions in hard-float mode if only
	single-precision arithmetic is supported in hardware.

From-SVN: r184197

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7705d34ba7395f791374035d6e3de6136a78243e..54e4e590d3c2ad71b740ce18c61624d7c0431d4b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,18 @@
+2012-02-14  Bin Cheng  <bin.cheng@arm.com>
+
+       Backport from mainline.
+       2012-01-30  Bin Cheng  <bin.cheng@arm.com>
+
+       PR target/51835
+       * config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI
+       for __aeabi_d2iz/__aeabi_d2uiz with hard-float.
+
+       2011-06-08  Julian Brown  <julian@codesourcery.com>
+
+       * config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI
+       for double-precision helper functions in hard-float mode if only
+       single-precision arithmetic is supported in hardware.
+
 2012-02-09  Jakub Jelinek  <jakub@redhat.com>
 
        Backported from mainline

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 08208b75fc070a07d96a141b85a9c09c6add6fe4..8522c283fa2f123d0fe7572b351fcff47bb654e0 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3338,6 +3338,10 @@ arm_libcall_uses_aapcs_base (const_rtx libcall)
                   convert_optab_libfunc (sext_optab, SFmode, HFmode));
       add_libcall (libcall_htab,
                   convert_optab_libfunc (trunc_optab, HFmode, SFmode));
+      add_libcall (libcall_htab,
+                  convert_optab_libfunc (sfix_optab, SImode, DFmode));
+      add_libcall (libcall_htab,
+                  convert_optab_libfunc (ufix_optab, SImode, DFmode));
       add_libcall (libcall_htab,
                   convert_optab_libfunc (sfix_optab, DImode, DFmode));
       add_libcall (libcall_htab,
@@ -3346,6 +3350,28 @@ arm_libcall_uses_aapcs_base (const_rtx libcall)
                   convert_optab_libfunc (sfix_optab, DImode, SFmode));
       add_libcall (libcall_htab,
                   convert_optab_libfunc (ufix_optab, DImode, SFmode));
+
+      /* Values from double-precision helper functions are returned in core
+        registers if the selected core only supports single-precision
+        arithmetic, even if we are using the hard-float ABI.  The same is
+        true for single-precision helpers, but we will never be using the
+        hard-float ABI on a CPU which doesn't support single-precision
+        operations in hardware.  */
+      add_libcall (libcall_htab, optab_libfunc (add_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (sdiv_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (smul_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (neg_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (sub_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (eq_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (lt_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (le_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (ge_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (gt_optab, DFmode));
+      add_libcall (libcall_htab, optab_libfunc (unord_optab, DFmode));
+      add_libcall (libcall_htab, convert_optab_libfunc (sext_optab, DFmode,
+                                                       SFmode));
+      add_libcall (libcall_htab, convert_optab_libfunc (trunc_optab, SFmode,
+                                                       DFmode));
     }
 
   return libcall && htab_find (libcall_htab, libcall) != NULL;

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d4ef9a7626d15b75a5c103a08d421cc100f6aafe..8b1e461c2c6e875cb1b4a5de27793ad564ef4136 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2012-02-14  Bin Cheng  <bin.cheng@arm.com>
+
+       Backport from mainline.
+       2012-01-30  Bin Cheng  <bin.cheng@arm.com>
+
+       PR target/51835
+       * gcc.target/arm/pr51835.c: New testcase.
+
 2012-02-09  Jakub Jelinek  <jakub@redhat.com>
 
        Backported from mainline

diff --git a/gcc/testsuite/gcc.target/arm/pr51835.c b/gcc/testsuite/gcc.target/arm/pr51835.c
new file mode 100644 (file)
index 0000000..858b72f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr51835.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mfloat-abi=hard -mfpu=fpv4-sp-d16" }  */
+/* { dg-require-effective-target arm_thumb2_ok } */
+
+int func1 (double d)
+{
+  return (int)d;
+}
+unsigned int func2 (double d)
+{
+  return (unsigned int)d;
+}
+
+/* { dg-final { scan-assembler-times "fmrrd\[\\t \]+r0,\[\\t \]*r1,\[\\t \]*d0" 2 } } */