]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
PR testsuite/85483: Move aarch64/sve/vcond_1.c test to g++.dg/other/
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Fri, 20 Apr 2018 16:31:19 +0000 (16:31 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Fri, 20 Apr 2018 16:31:19 +0000 (16:31 +0000)
I totally botched up this sve test file in 259437.
It needs C++, so move it to g++.dg/other and make it a .C file.
Also adds the target guards to prevent it from running on non-aarch64 targets.

Tested that it passes on aarch64-none-elf and doesn't get run on arm-none-eabi.

Committing to trunk as obvious.

PR testsuite/85483
* gcc.target/aarch64/sve/vcond_1.c: Move to...
* g++.dg/other/sve_vcond_1.C: ... Here.  Add target directives.
* gcc.target/aarch64/sve/vcond_1_run.c: Move to...
* g++.dg/other/sve_vcond_1_run.C: ... Here.  Change include file name.

From-SVN: r259526

gcc/testsuite/ChangeLog
gcc/testsuite/g++.dg/other/sve_vcond_1.C [moved from gcc/testsuite/gcc.target/aarch64/sve/vcond_1.c with 98% similarity]
gcc/testsuite/g++.dg/other/sve_vcond_1_run.C [moved from gcc/testsuite/gcc.target/aarch64/sve/vcond_1_run.c with 97% similarity]

index 8e9787647133bb629f088c8f9b4bdbd50ef286f6..4bc930152b82de455d9986b615a8c634f9febf74 100644 (file)
@@ -1,3 +1,11 @@
+2018-04-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR testsuite/85483
+       * gcc.target/aarch64/sve/vcond_1.c: Move to...
+       * g++.dg/other/sve_vcond_1.C: ... Here.  Add target directives.
+       * gcc.target/aarch64/sve/vcond_1_run.c: Move to...
+       * g++.dg/other/sve_vcond_1_run.C: ... Here.  Change include file name.
+
 2018-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR target/85469
similarity index 98%
rename from gcc/testsuite/gcc.target/aarch64/sve/vcond_1.c
rename to gcc/testsuite/g++.dg/other/sve_vcond_1.C
index 66208425e2ee4240e7d184033a6239bb456da3fe..c1ad0b91b0cb6ad038411061f292d9063eb37f5a 100644 (file)
@@ -1,5 +1,5 @@
-/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O -msve-vector-bits=256 --save-temps" } */
+/* { dg-do assemble { target { aarch64_asm_sve_ok && { ! ilp32 } } } } */
+/* { dg-options "-march=armv8.2-a+sve -O -msve-vector-bits=256 --save-temps" } */
 
 typedef __INT8_TYPE__ vnx16qi __attribute__((vector_size(32)));
 typedef __INT16_TYPE__ vnx8hi __attribute__((vector_size(32)));
similarity index 97%
rename from gcc/testsuite/gcc.target/aarch64/sve/vcond_1_run.c
rename to gcc/testsuite/g++.dg/other/sve_vcond_1_run.C
index 72dab3942a965edbf7f304f0a12ed62e5e02d826..d01745e6864758ec6b0c880f5436052fed3b156b 100644 (file)
@@ -2,7 +2,7 @@
 /* { dg-options "-O" } */
 /* { dg-options "-O -msve-vector-bits=256" { target aarch64_sve256_hw } } */
 
-#include "vcond_1.c"
+#include "sve_vcond_1.c"
 
 #define NUM_ELEMS(X) (sizeof (X) / sizeof (X[0]))