]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Add soc v1_0 ih client id table
authorHawking Zhang <Hawking.Zhang@amd.com>
Wed, 2 Jul 2025 08:21:26 +0000 (16:21 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 16 Dec 2025 18:27:42 +0000 (13:27 -0500)
To acommandate the specific ih client for soc v1_0

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c
drivers/gpu/drm/amd/include/soc_v1_0_ih_clientid.h [new file with mode: 0644]

index 8112ffc85995e38f04fa2021f07bc16de801bb8f..0a1bf61a113204252bfca6e7da7118f31732bc1a 100644 (file)
@@ -99,6 +99,41 @@ const char *soc15_ih_clientid_name[] = {
        "MP1"
 };
 
+const char *soc_v1_0_ih_clientid_name[] = {
+       "IH",
+       "Reserved",
+       "ATHUB",
+       "BIF",
+       "Reserved",
+       "Reserved",
+       "Reserved",
+       "RLC",
+       "Reserved",
+       "Reserved",
+       "GFX",
+       "IMU",
+       "Reserved",
+       "Reserved",
+       "VCN1 or UVD1",
+       "THM",
+       "VCN or UVD",
+       "Reserved",
+       "VMC",
+       "Reserved",
+       "GRBM_CP",
+       "GC_AID",
+       "ROM_SMUIO",
+       "DF",
+       "Reserved",
+       "PWR",
+       "LSDMA",
+       "GC_UTCL2",
+       "nHT",
+       "Reserved",
+       "MP0",
+       "MP1",
+};
+
 const int node_id_to_phys_map[NODEID_MAX] = {
        [AID0_NODEID] = 0,
        [XCD0_NODEID] = 0,
index 9f0417456abda16cd562c330425a768f58ad2925..af72405a7226263ca3a9a3359beee58be2b14668 100644 (file)
@@ -26,6 +26,7 @@
 
 #include <linux/irqdomain.h>
 #include "soc15_ih_clientid.h"
+#include "soc_v1_0_ih_clientid.h"
 #include "amdgpu_ih.h"
 
 #define AMDGPU_MAX_IRQ_SRC_ID          0x100
index a30fac3d57609418390633a160ce95378e72ee72..a8f020a375c9235cae8fb15fdd9be4ca7d772403 100644 (file)
@@ -1140,21 +1140,21 @@ static int gfx_v12_1_sw_init(struct amdgpu_ip_block *ip_block)
        num_xcc = NUM_XCC(adev->gfx.xcc_mask);
 
        /* EOP Event */
-       r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GRBM_CP,
+       r = amdgpu_irq_add_id(adev, SOC_V1_0_IH_CLIENTID_GRBM_CP,
                              GFX_11_0_0__SRCID__CP_EOP_INTERRUPT,
                              &adev->gfx.eop_irq);
        if (r)
                return r;
 
        /* Privileged reg */
-       r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GRBM_CP,
+       r = amdgpu_irq_add_id(adev, SOC_V1_0_IH_CLIENTID_GRBM_CP,
                              GFX_11_0_0__SRCID__CP_PRIV_REG_FAULT,
                              &adev->gfx.priv_reg_irq);
        if (r)
                return r;
 
        /* Privileged inst */
-       r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GRBM_CP,
+       r = amdgpu_irq_add_id(adev, SOC_V1_0_IH_CLIENTID_GRBM_CP,
                              GFX_11_0_0__SRCID__CP_PRIV_INSTR_FAULT,
                              &adev->gfx.priv_inst_irq);
        if (r)
index fa46b0089e8dd3b037355772a771b79ec0446728..19cd38ce57c947badc727670cba4424f7487f0c8 100644 (file)
@@ -124,7 +124,7 @@ static int gmc_v12_1_process_interrupt(struct amdgpu_device *adev,
                write_fault = !!(entry->src_data[1] & 0x200000);
        }
 
-       if (entry->client_id == SOC21_IH_CLIENTID_VMC) {
+       if (entry->client_id == SOC_V1_0_IH_CLIENTID_VMC) {
                hub_name = "mmhub0";
                vmhub = AMDGPU_MMHUB0(node_id / 4);
        } else {
@@ -198,8 +198,8 @@ static int gmc_v12_1_process_interrupt(struct amdgpu_device *adev,
                amdgpu_vm_put_task_info(task_info);
        }
 
-       dev_err(adev->dev, "  in page starting at address 0x%016llx from IH client %d\n",
-               addr, entry->client_id);
+       dev_err(adev->dev, "  in page starting at address 0x%016llx from IH client %d (%s)\n",
+               addr, entry->client_id, soc_v1_0_ih_clientid_name[entry->client_id]);
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index 753512276e3731e7997014e2570acd26ffcd3871..446b7527f5c62016a79bafcc20aad958105ce8ea 100644 (file)
@@ -1277,7 +1277,7 @@ static int sdma_v7_1_sw_init(struct amdgpu_ip_block *ip_block)
        u32 xcc_id;
 
        /* SDMA trap event */
-       r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GFX,
+       r = amdgpu_irq_add_id(adev, SOC_V1_0_IH_CLIENTID_GFX,
                              GFX_11_0_0__SRCID__SDMA_TRAP,
                              &adev->sdma.trap_irq);
        if (r)
@@ -1526,7 +1526,7 @@ static int sdma_v7_1_process_trap_irq(struct amdgpu_device *adev,
        }
 
        switch (entry->client_id) {
-       case SOC21_IH_CLIENTID_GFX:
+       case SOC_V1_0_IH_CLIENTID_GFX:
                switch (queue) {
                case 0:
                        amdgpu_fence_process(&adev->sdma.instance[instances].ring);
diff --git a/drivers/gpu/drm/amd/include/soc_v1_0_ih_clientid.h b/drivers/gpu/drm/amd/include/soc_v1_0_ih_clientid.h
new file mode 100644 (file)
index 0000000..11ab4b7
--- /dev/null
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2025 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#ifndef __SOC_V1_0_IH_CLIENTID_H__
+#define __SOC_V1_0_IH_CLIENTID_H__
+
+extern const char *soc_v1_0_ih_clientid_name[];
+
+enum soc_v1_0_ih_clientid {
+       SOC_V1_0_IH_CLIENTID_IH                 = 0x00,
+       SOC_V1_0_IH_CLIENTID_ATHUB              = 0x02,
+       SOC_V1_0_IH_CLIENTID_BIF                = 0x03,
+       SOC_V1_0_IH_CLIENTID_RLC                = 0x07,
+       SOC_V1_0_IH_CLIENTID_GFX                = 0x0a,
+       SOC_V1_0_IH_CLIENTID_IMU                = 0x0b,
+       SOC_V1_0_IH_CLIENTID_VCN1               = 0x0e,
+       SOC_V1_0_IH_CLIENTID_THM                = 0x0f,
+       SOC_V1_0_IH_CLIENTID_VCN                = 0x10,
+       SOC_V1_0_IH_CLIENTID_VMC                = 0x12,
+       SOC_V1_0_IH_CLIENTID_GRBM_CP            = 0x14,
+       SOC_V1_0_IH_CLIENTID_GC_AID             = 0x15,
+       SOC_V1_0_IH_CLIENTID_ROM_SMUIO          = 0x16,
+       SOC_V1_0_IH_CLIENTID_DF                 = 0x17,
+       SOC_V1_0_IH_CLIENTID_PWR                = 0x19,
+       SOC_V1_0_IH_CLIENTID_LSDMA              = 0x1a,
+       SOC_V1_0_IH_CLIENTID_GC_UTCL2           = 0x1b,
+       SOC_V1_0_IH_CLIENTID_nHT                = 0X1c,
+       SOC_V1_0_IH_CLIENTID_MP0                = 0x1e,
+       SOC_V1_0_IH_CLIENTID_MP1                = 0x1f,
+       SOC_V1_0_IH_CLIENTID_MAX,
+};
+
+#endif