]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: ls1046a-qds: describe the FPGA based GPIO controller
authorIoana Ciornei <ioana.ciornei@nxp.com>
Tue, 14 Oct 2025 15:53:56 +0000 (18:53 +0300)
committerShawn Guo <shawnguo@kernel.org>
Mon, 27 Oct 2025 06:26:47 +0000 (14:26 +0800)
The QIXIS FPGA node is extended so that it describes the GPIO controller
responsible for all the status presence lines on both SFP+ cages as well
as the IO SLOTs present on the board.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts

index 736722b58e77f74b9a067a3e6e35b9dad19ad816..812cf1c5d7f4e60eb0795d96edbe868dc62bb7d2 100644 (file)
 
        fpga: board-control@2,0 {
                compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-mfd";
+               #address-cells = <1>;
+               #size-cells = <1>;
                reg = <0x2 0x0 0x0000100>;
                ranges = <0 2 0 0x100>;
+
+               stat_pres2: gpio@c {
+                       compatible = "fsl,ls1046aqds-fpga-gpio-stat-pres2";
+                       reg = <0xc 1>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio-line-names =
+                               "SLOT1", "SLOT2", "SLOT3", "SLOT4", "SLOT5", "SLOT6",
+                               "SFP1_MOD_DEF", "SFP2_MOD_DEF";
+               };
        };
 };