unsigned int map_width;
unsigned int map_height;
bool user_map_is_set;
+ bool user_map_is_dirty;
/* Source and destination queue data */
struct dw100_q_data q_data[2];
return (u32)((yq << 16) | xq);
}
-static u32 *dw100_get_user_map(struct dw100_ctx *ctx)
+static void dw100_update_mapping(struct dw100_ctx *ctx)
{
struct v4l2_ctrl *ctrl = ctx->ctrls[DW100_CTRL_DEWARPING_MAP];
- return ctrl->p_cur.p_u32;
+ if (!ctx->user_map_is_dirty)
+ return;
+
+ memcpy(ctx->map, ctrl->p_cur.p_u32, ctx->map_size);
+ ctx->user_map_is_dirty = false;
}
/*
*/
static int dw100_create_mapping(struct dw100_ctx *ctx)
{
- u32 *user_map;
-
if (ctx->map)
dma_free_coherent(&ctx->dw_dev->pdev->dev, ctx->map_size,
ctx->map, ctx->map_dma);
if (!ctx->map)
return -ENOMEM;
- user_map = dw100_get_user_map(ctx);
- memcpy(ctx->map, user_map, ctx->map_size);
+ ctx->user_map_is_dirty = true;
+ dw100_update_mapping(ctx);
dev_dbg(&ctx->dw_dev->pdev->dev,
"%ux%u %s mapping created (d:%pad-c:%p) for stream %ux%u->%ux%u\n",
switch (ctrl->id) {
case V4L2_CID_DW100_DEWARPING_16x16_VERTEX_MAP:
ctx->user_map_is_set = true;
+ ctx->user_map_is_dirty = true;
break;
}
}
ctx->user_map_is_set = false;
+ ctx->user_map_is_dirty = true;
}
static const struct v4l2_ctrl_type_ops dw100_ctrl_type_ops = {
v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req,
&ctx->hdl);
+ if (src_buf->vb2_buf.req_obj.req)
+ dw100_update_mapping(ctx);
+ else if (ctx->user_map_is_dirty)
+ dev_warn_once(&ctx->dw_dev->pdev->dev,
+ "V4L2 requests are required to update the vertex map dynamically\n");
+
/*
* As the hardware does not update any volatile controls, we can
* complete control handling before starting the dewarper.