drm/msm/a6xx: Add SKU detection support for X2-85

Add the Speedbin table to the catalog to enable SKU detection support
for X2-85 GPU found in Glymur chipset. As this chipset support the SOFT
FUSE mechanism, enable the ADRENO_QUIRK_SOFTFUSE quirk too.

Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/714677/
Message-ID: <20260327-a8xx-gpu-batch2-v2-13-2b53c38d2101@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
index f6b9792531a6b2b2c12d9a2b238faf850d5382d6..758bc7bd31f6935a60c7795f39ac5d57f6ccab1e 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
@@ -1902,7 +1902,8 @@ static const struct adreno_info a8xx_gpus[] = {
                .gmem = 21 * SZ_1M,
                .inactive_period = DRM_MSM_INACTIVE_PERIOD,
                .quirks = ADRENO_QUIRK_HAS_CACHED_COHERENT |
-                         ADRENO_QUIRK_HAS_HW_APRIV,
+                         ADRENO_QUIRK_HAS_HW_APRIV |
+                         ADRENO_QUIRK_SOFTFUSE,
                .funcs = &a8xx_gpu_funcs,
                .a6xx = &(const struct a6xx_info) {
                        .protect = &x285_protect,
@@ -1922,6 +1923,12 @@ static const struct adreno_info a8xx_gpus[] = {
                                { /* sentinel */ },
                        },
                },
+               .speedbins = ADRENO_SPEEDBINS(
+                       { 0,   0 },
+                       { 388, 1 },
+                       { 357, 2 },
+                       { 284, 3 },
+               ),
        }, {
                .chip_ids = ADRENO_CHIP_IDS(0x44050a01),
                .family = ADRENO_8XX_GEN2,