]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
wifi: ath12k: unify HAL ops naming across chips
authorRipan Deuri <quic_rdeuri@quicinc.com>
Wed, 10 Sep 2025 18:14:09 +0000 (23:44 +0530)
committerJeff Johnson <jeff.johnson@oss.qualcomm.com>
Thu, 11 Sep 2025 14:26:54 +0000 (07:26 -0700)
Rename HAL ops to follow a consistent hal ops format:
ath12k_hal_rx_xxxx_<chip>.

Remove "compact" references as non-compacts variant is no longer used.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.4.1-00199-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3

Signed-off-by: Pavankumar Nandeshwar <quic_pnandesh@quicinc.com>
Signed-off-by: Ripan Deuri <quic_rdeuri@quicinc.com>
Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com>
Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com>
Link: https://patch.msgid.link/20250910181414.2062280-4-quic_rdeuri@quicinc.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
drivers/net/wireless/ath/ath12k/hal.c
drivers/net/wireless/ath/ath12k/wifi7/hal_qcn9274.c
drivers/net/wireless/ath/ath12k/wifi7/hal_qcn9274.h
drivers/net/wireless/ath/ath12k/wifi7/hal_wcn7850.c
drivers/net/wireless/ath/ath12k/wifi7/hal_wcn7850.h

index 77024c99d0bf0a4df87d41162da849dc107a37a7..1fba023d0859d89f2e090fb630aa9bd1a5c0964e 100644 (file)
@@ -407,56 +407,56 @@ static int ath12k_hal_srng_create_config_qcn9274(struct ath12k_base *ab)
 }
 
 const struct hal_rx_ops hal_rx_qcn9274_compact_ops = {
-       .rx_desc_get_first_msdu = ath12k_hw_qcn9274_compact_rx_desc_get_first_msdu,
-       .rx_desc_get_last_msdu = ath12k_hw_qcn9274_compact_rx_desc_get_last_msdu,
-       .rx_desc_get_l3_pad_bytes = ath12k_hw_qcn9274_compact_rx_desc_get_l3_pad_bytes,
-       .rx_desc_encrypt_valid = ath12k_hw_qcn9274_compact_rx_desc_encrypt_valid,
-       .rx_desc_get_encrypt_type = ath12k_hw_qcn9274_compact_rx_desc_get_encrypt_type,
-       .rx_desc_get_decap_type = ath12k_hw_qcn9274_compact_rx_desc_get_decap_type,
-       .rx_desc_get_mesh_ctl = ath12k_hw_qcn9274_compact_rx_desc_get_mesh_ctl,
+       .rx_desc_get_first_msdu = ath12k_hal_rx_desc_get_first_msdu_qcn9274,
+       .rx_desc_get_last_msdu = ath12k_hal_rx_desc_get_last_msdu_qcn9274,
+       .rx_desc_get_l3_pad_bytes = ath12k_hal_rx_desc_get_l3_pad_bytes_qcn9274,
+       .rx_desc_encrypt_valid = ath12k_hal_rx_desc_encrypt_valid_qcn9274,
+       .rx_desc_get_encrypt_type = ath12k_hal_rx_desc_get_encrypt_type_qcn9274,
+       .rx_desc_get_decap_type = ath12k_hal_rx_desc_get_decap_type_qcn9274,
+       .rx_desc_get_mesh_ctl = ath12k_hal_rx_desc_get_mesh_ctl_qcn9274,
        .rx_desc_get_mpdu_seq_ctl_vld =
-               ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_seq_ctl_vld,
-       .rx_desc_get_mpdu_fc_valid = ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_fc_valid,
+               ath12k_hal_rx_desc_get_mpdu_seq_ctl_vld_qcn9274,
+       .rx_desc_get_mpdu_fc_valid = ath12k_hal_rx_desc_get_mpdu_fc_valid_qcn9274,
        .rx_desc_get_mpdu_start_seq_no =
-               ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_start_seq_no,
-       .rx_desc_get_msdu_len = ath12k_hw_qcn9274_compact_rx_desc_get_msdu_len,
-       .rx_desc_get_msdu_sgi = ath12k_hw_qcn9274_compact_rx_desc_get_msdu_sgi,
-       .rx_desc_get_msdu_rate_mcs = ath12k_hw_qcn9274_compact_rx_desc_get_msdu_rate_mcs,
-       .rx_desc_get_msdu_rx_bw = ath12k_hw_qcn9274_compact_rx_desc_get_msdu_rx_bw,
-       .rx_desc_get_msdu_freq = ath12k_hw_qcn9274_compact_rx_desc_get_msdu_freq,
-       .rx_desc_get_msdu_pkt_type = ath12k_hw_qcn9274_compact_rx_desc_get_msdu_pkt_type,
-       .rx_desc_get_msdu_nss = ath12k_hw_qcn9274_compact_rx_desc_get_msdu_nss,
-       .rx_desc_get_mpdu_tid = ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_tid,
-       .rx_desc_get_mpdu_peer_id = ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_peer_id,
-       .rx_desc_copy_end_tlv = ath12k_hw_qcn9274_compact_rx_desc_copy_end_tlv,
-       .rx_desc_get_mpdu_ppdu_id = ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_ppdu_id,
-       .rx_desc_set_msdu_len = ath12k_hw_qcn9274_compact_rx_desc_set_msdu_len,
-       .rx_desc_get_msdu_payload = ath12k_hw_qcn9274_compact_rx_desc_get_msdu_payload,
+               ath12k_hal_rx_desc_get_mpdu_start_seq_no_qcn9274,
+       .rx_desc_get_msdu_len = ath12k_hal_rx_desc_get_msdu_len_qcn9274,
+       .rx_desc_get_msdu_sgi = ath12k_hal_rx_desc_get_msdu_sgi_qcn9274,
+       .rx_desc_get_msdu_rate_mcs = ath12k_hal_rx_desc_get_msdu_rate_mcs_qcn9274,
+       .rx_desc_get_msdu_rx_bw = ath12k_hal_rx_desc_get_msdu_rx_bw_qcn9274,
+       .rx_desc_get_msdu_freq = ath12k_hal_rx_desc_get_msdu_freq_qcn9274,
+       .rx_desc_get_msdu_pkt_type = ath12k_hal_rx_desc_get_msdu_pkt_type_qcn9274,
+       .rx_desc_get_msdu_nss = ath12k_hal_rx_desc_get_msdu_nss_qcn9274,
+       .rx_desc_get_mpdu_tid = ath12k_hal_rx_desc_get_mpdu_tid_qcn9274,
+       .rx_desc_get_mpdu_peer_id = ath12k_hal_rx_desc_get_mpdu_peer_id_qcn9274,
+       .rx_desc_copy_end_tlv = ath12k_hal_rx_desc_copy_end_tlv_qcn9274,
+       .rx_desc_get_mpdu_ppdu_id = ath12k_hal_rx_desc_get_mpdu_ppdu_id_qcn9274,
+       .rx_desc_set_msdu_len = ath12k_hal_rx_desc_set_msdu_len_qcn9274,
+       .rx_desc_get_msdu_payload = ath12k_hal_rx_desc_get_msdu_payload_qcn9274,
        .rx_desc_get_mpdu_start_offset =
-               ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_start_offset,
+               ath12k_hal_rx_desc_get_mpdu_start_offset_qcn9274,
        .rx_desc_get_msdu_end_offset =
-               ath12k_hw_qcn9274_compact_rx_desc_get_msdu_end_offset,
-       .rx_desc_mac_addr2_valid = ath12k_hw_qcn9274_compact_rx_desc_mac_addr2_valid,
-       .rx_desc_mpdu_start_addr2 = ath12k_hw_qcn9274_compact_rx_desc_mpdu_start_addr2,
-       .rx_desc_is_da_mcbc = ath12k_hw_qcn9274_compact_rx_desc_is_da_mcbc,
-       .rx_desc_get_dot11_hdr = ath12k_hw_qcn9274_compact_rx_desc_get_dot11_hdr,
-       .rx_desc_get_crypto_header = ath12k_hw_qcn9274_compact_rx_desc_get_crypto_hdr,
-       .dp_rx_h_msdu_done = ath12k_hw_qcn9274_compact_dp_rx_h_msdu_done,
-       .dp_rx_h_l4_cksum_fail = ath12k_hw_qcn9274_compact_dp_rx_h_l4_cksum_fail,
-       .dp_rx_h_ip_cksum_fail = ath12k_hw_qcn9274_compact_dp_rx_h_ip_cksum_fail,
-       .dp_rx_h_is_decrypted = ath12k_hw_qcn9274_compact_dp_rx_h_is_decrypted,
-       .dp_rx_h_mpdu_err = ath12k_hw_qcn9274_compact_dp_rx_h_mpdu_err,
-       .rx_desc_get_desc_size = ath12k_hw_qcn9274_compact_get_rx_desc_size,
+               ath12k_hal_rx_desc_get_msdu_end_offset_qcn9274,
+       .rx_desc_mac_addr2_valid = ath12k_hal_rx_desc_mac_addr2_valid_qcn9274,
+       .rx_desc_mpdu_start_addr2 = ath12k_hal_rx_desc_mpdu_start_addr2_qcn9274,
+       .rx_desc_is_da_mcbc = ath12k_hal_rx_desc_is_da_mcbc_qcn9274,
+       .rx_desc_get_dot11_hdr = ath12k_hal_rx_desc_get_dot11_hdr_qcn9274,
+       .rx_desc_get_crypto_header = ath12k_hal_rx_desc_get_crypto_hdr_qcn9274,
+       .dp_rx_h_msdu_done = ath12k_hal_rx_h_msdu_done_qcn9274,
+       .dp_rx_h_l4_cksum_fail = ath12k_hal_rx_h_l4_cksum_fail_qcn9274,
+       .dp_rx_h_ip_cksum_fail = ath12k_hal_rx_h_ip_cksum_fail_qcn9274,
+       .dp_rx_h_is_decrypted = ath12k_hal_rx_h_is_decrypted_qcn9274,
+       .dp_rx_h_mpdu_err = ath12k_hal_rx_h_mpdu_err_qcn9274,
+       .rx_desc_get_desc_size = ath12k_hal_get_rx_desc_size_qcn9274,
        .rx_desc_get_msdu_src_link_id =
-               ath12k_hw_qcn9274_compact_rx_desc_get_msdu_src_link,
+               ath12k_hal_rx_desc_get_msdu_src_link_qcn9274,
 };
 EXPORT_SYMBOL(hal_rx_qcn9274_compact_ops);
 
 const struct hal_ops hal_qcn9274_ops = {
        .create_srng_config = ath12k_hal_srng_create_config_qcn9274,
        .tcl_to_wbm_rbm_map = ath12k_hal_qcn9274_tcl_to_wbm_rbm_map,
-       .rxdma_ring_wmask_rx_mpdu_start = ath12k_hal_qcn9274_rx_mpdu_start_wmask_get,
-       .rxdma_ring_wmask_rx_msdu_end = ath12k_hal_qcn9274_rx_msdu_end_wmask_get,
+       .rxdma_ring_wmask_rx_mpdu_start = ath12k_hal_rx_mpdu_start_wmask_get_qcn9274,
+       .rxdma_ring_wmask_rx_msdu_end = ath12k_hal_rx_msdu_end_wmask_get_qcn9274,
 };
 EXPORT_SYMBOL(hal_qcn9274_ops);
 
@@ -585,44 +585,44 @@ static int ath12k_hal_srng_create_config_wcn7850(struct ath12k_base *ab)
 }
 
 const struct hal_rx_ops hal_rx_wcn7850_ops = {
-       .rx_desc_get_first_msdu = ath12k_hw_wcn7850_rx_desc_get_first_msdu,
-       .rx_desc_get_last_msdu = ath12k_hw_wcn7850_rx_desc_get_last_msdu,
-       .rx_desc_get_l3_pad_bytes = ath12k_hw_wcn7850_rx_desc_get_l3_pad_bytes,
-       .rx_desc_encrypt_valid = ath12k_hw_wcn7850_rx_desc_encrypt_valid,
-       .rx_desc_get_encrypt_type = ath12k_hw_wcn7850_rx_desc_get_encrypt_type,
-       .rx_desc_get_decap_type = ath12k_hw_wcn7850_rx_desc_get_decap_type,
-       .rx_desc_get_mesh_ctl = ath12k_hw_wcn7850_rx_desc_get_mesh_ctl,
-       .rx_desc_get_mpdu_seq_ctl_vld = ath12k_hw_wcn7850_rx_desc_get_mpdu_seq_ctl_vld,
-       .rx_desc_get_mpdu_fc_valid = ath12k_hw_wcn7850_rx_desc_get_mpdu_fc_valid,
-       .rx_desc_get_mpdu_start_seq_no = ath12k_hw_wcn7850_rx_desc_get_mpdu_start_seq_no,
-       .rx_desc_get_msdu_len = ath12k_hw_wcn7850_rx_desc_get_msdu_len,
-       .rx_desc_get_msdu_sgi = ath12k_hw_wcn7850_rx_desc_get_msdu_sgi,
-       .rx_desc_get_msdu_rate_mcs = ath12k_hw_wcn7850_rx_desc_get_msdu_rate_mcs,
-       .rx_desc_get_msdu_rx_bw = ath12k_hw_wcn7850_rx_desc_get_msdu_rx_bw,
-       .rx_desc_get_msdu_freq = ath12k_hw_wcn7850_rx_desc_get_msdu_freq,
-       .rx_desc_get_msdu_pkt_type = ath12k_hw_wcn7850_rx_desc_get_msdu_pkt_type,
-       .rx_desc_get_msdu_nss = ath12k_hw_wcn7850_rx_desc_get_msdu_nss,
-       .rx_desc_get_mpdu_tid = ath12k_hw_wcn7850_rx_desc_get_mpdu_tid,
-       .rx_desc_get_mpdu_peer_id = ath12k_hw_wcn7850_rx_desc_get_mpdu_peer_id,
-       .rx_desc_copy_end_tlv = ath12k_hw_wcn7850_rx_desc_copy_end_tlv,
-       .rx_desc_get_mpdu_start_tag = ath12k_hw_wcn7850_rx_desc_get_mpdu_start_tag,
-       .rx_desc_get_mpdu_ppdu_id = ath12k_hw_wcn7850_rx_desc_get_mpdu_ppdu_id,
-       .rx_desc_set_msdu_len = ath12k_hw_wcn7850_rx_desc_set_msdu_len,
-       .rx_desc_get_msdu_payload = ath12k_hw_wcn7850_rx_desc_get_msdu_payload,
-       .rx_desc_get_mpdu_start_offset = ath12k_hw_wcn7850_rx_desc_get_mpdu_start_offset,
-       .rx_desc_get_msdu_end_offset = ath12k_hw_wcn7850_rx_desc_get_msdu_end_offset,
-       .rx_desc_mac_addr2_valid = ath12k_hw_wcn7850_rx_desc_mac_addr2_valid,
-       .rx_desc_mpdu_start_addr2 = ath12k_hw_wcn7850_rx_desc_mpdu_start_addr2,
-       .rx_desc_is_da_mcbc = ath12k_hw_wcn7850_rx_desc_is_da_mcbc,
-       .rx_desc_get_dot11_hdr = ath12k_hw_wcn7850_rx_desc_get_dot11_hdr,
-       .rx_desc_get_crypto_header = ath12k_hw_wcn7850_rx_desc_get_crypto_hdr,
-       .dp_rx_h_msdu_done = ath12k_hw_wcn7850_dp_rx_h_msdu_done,
-       .dp_rx_h_l4_cksum_fail = ath12k_hw_wcn7850_dp_rx_h_l4_cksum_fail,
-       .dp_rx_h_ip_cksum_fail = ath12k_hw_wcn7850_dp_rx_h_ip_cksum_fail,
-       .dp_rx_h_is_decrypted = ath12k_hw_wcn7850_dp_rx_h_is_decrypted,
-       .dp_rx_h_mpdu_err = ath12k_hw_wcn7850_dp_rx_h_mpdu_err,
-       .rx_desc_get_desc_size = ath12k_hw_wcn7850_get_rx_desc_size,
-       .rx_desc_get_msdu_src_link_id = ath12k_hw_wcn7850_rx_desc_get_msdu_src_link,
+       .rx_desc_get_first_msdu = ath12k_hal_rx_desc_get_first_msdu_wcn7850,
+       .rx_desc_get_last_msdu = ath12k_hal_rx_desc_get_last_msdu_wcn7850,
+       .rx_desc_get_l3_pad_bytes = ath12k_hal_rx_desc_get_l3_pad_bytes_wcn7850,
+       .rx_desc_encrypt_valid = ath12k_hal_rx_desc_encrypt_valid_wcn7850,
+       .rx_desc_get_encrypt_type = ath12k_hal_rx_desc_get_encrypt_type_wcn7850,
+       .rx_desc_get_decap_type = ath12k_hal_rx_desc_get_decap_type_wcn7850,
+       .rx_desc_get_mesh_ctl = ath12k_hal_rx_desc_get_mesh_ctl_wcn7850,
+       .rx_desc_get_mpdu_seq_ctl_vld = ath12k_hal_rx_desc_get_mpdu_seq_ctl_vld_wcn7850,
+       .rx_desc_get_mpdu_fc_valid = ath12k_hal_rx_desc_get_mpdu_fc_valid_wcn7850,
+       .rx_desc_get_mpdu_start_seq_no = ath12k_hal_rx_desc_get_mpdu_start_seq_no_wcn7850,
+       .rx_desc_get_msdu_len = ath12k_hal_rx_desc_get_msdu_len_wcn7850,
+       .rx_desc_get_msdu_sgi = ath12k_hal_rx_desc_get_msdu_sgi_wcn7850,
+       .rx_desc_get_msdu_rate_mcs = ath12k_hal_rx_desc_get_msdu_rate_mcs_wcn7850,
+       .rx_desc_get_msdu_rx_bw = ath12k_hal_rx_desc_get_msdu_rx_bw_wcn7850,
+       .rx_desc_get_msdu_freq = ath12k_hal_rx_desc_get_msdu_freq_wcn7850,
+       .rx_desc_get_msdu_pkt_type = ath12k_hal_rx_desc_get_msdu_pkt_type_wcn7850,
+       .rx_desc_get_msdu_nss = ath12k_hal_rx_desc_get_msdu_nss_wcn7850,
+       .rx_desc_get_mpdu_tid = ath12k_hal_rx_desc_get_mpdu_tid_wcn7850,
+       .rx_desc_get_mpdu_peer_id = ath12k_hal_rx_desc_get_mpdu_peer_id_wcn7850,
+       .rx_desc_copy_end_tlv = ath12k_hal_rx_desc_copy_end_tlv_wcn7850,
+       .rx_desc_get_mpdu_start_tag = ath12k_hal_rx_desc_get_mpdu_start_tag_wcn7850,
+       .rx_desc_get_mpdu_ppdu_id = ath12k_hal_rx_desc_get_mpdu_ppdu_id_wcn7850,
+       .rx_desc_set_msdu_len = ath12k_hal_rx_desc_set_msdu_len_wcn7850,
+       .rx_desc_get_msdu_payload = ath12k_hal_rx_desc_get_msdu_payload_wcn7850,
+       .rx_desc_get_mpdu_start_offset = ath12k_hal_rx_desc_get_mpdu_start_offset_wcn7850,
+       .rx_desc_get_msdu_end_offset = ath12k_hal_rx_desc_get_msdu_end_offset_wcn7850,
+       .rx_desc_mac_addr2_valid = ath12k_hal_rx_desc_mac_addr2_valid_wcn7850,
+       .rx_desc_mpdu_start_addr2 = ath12k_hal_rx_desc_mpdu_start_addr2_wcn7850,
+       .rx_desc_is_da_mcbc = ath12k_hal_rx_desc_is_da_mcbc_wcn7850,
+       .rx_desc_get_dot11_hdr = ath12k_hal_rx_desc_get_dot11_hdr_wcn7850,
+       .rx_desc_get_crypto_header = ath12k_hal_rx_desc_get_crypto_hdr_wcn7850,
+       .dp_rx_h_msdu_done = ath12k_hal_rx_h_msdu_done_wcn7850,
+       .dp_rx_h_l4_cksum_fail = ath12k_hal_rx_h_l4_cksum_fail_wcn7850,
+       .dp_rx_h_ip_cksum_fail = ath12k_hal_rx_h_ip_cksum_fail_wcn7850,
+       .dp_rx_h_is_decrypted = ath12k_hal_rx_h_is_decrypted_wcn7850,
+       .dp_rx_h_mpdu_err = ath12k_hal_rx_h_mpdu_err_wcn7850,
+       .rx_desc_get_desc_size = ath12k_hal_get_rx_desc_size_wcn7850,
+       .rx_desc_get_msdu_src_link_id = ath12k_hal_rx_desc_get_msdu_src_link_wcn7850,
 };
 EXPORT_SYMBOL(hal_rx_wcn7850_ops);
 
index bd114e82d55bea42131103256ef879716ad91efd..bf09a40c91d9d78df71af3db7da418e41ef9c339 100644 (file)
 #include "hal_desc.h"
 #include "hal_qcn9274.h"
 
-bool ath12k_hw_qcn9274_compact_rx_desc_get_first_msdu(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_get_first_msdu_qcn9274(struct hal_rx_desc *desc)
 {
        return !!le16_get_bits(desc->u.qcn9274_compact.msdu_end.info5,
                               RX_MSDU_END_INFO5_FIRST_MSDU);
 }
 
-bool ath12k_hw_qcn9274_compact_rx_desc_get_last_msdu(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_get_last_msdu_qcn9274(struct hal_rx_desc *desc)
 {
        return !!le16_get_bits(desc->u.qcn9274_compact.msdu_end.info5,
                               RX_MSDU_END_INFO5_LAST_MSDU);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_l3_pad_bytes(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_l3_pad_bytes_qcn9274(struct hal_rx_desc *desc)
 {
        return le16_get_bits(desc->u.qcn9274_compact.msdu_end.info5,
                             RX_MSDU_END_INFO5_L3_HDR_PADDING);
 }
 
-bool ath12k_hw_qcn9274_compact_rx_desc_encrypt_valid(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_encrypt_valid_qcn9274(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.qcn9274_compact.mpdu_start.info4,
                               RX_MPDU_START_INFO4_ENCRYPT_INFO_VALID);
 }
 
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_encrypt_type(struct hal_rx_desc *desc)
+u32 ath12k_hal_rx_desc_get_encrypt_type_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.mpdu_start.info2,
                             RX_MPDU_START_INFO2_ENC_TYPE);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_decap_type(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_decap_type_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.msdu_end.info11,
                             RX_MSDU_END_INFO11_DECAP_FORMAT);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_mesh_ctl(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_mesh_ctl_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.msdu_end.info11,
                             RX_MSDU_END_INFO11_MESH_CTRL_PRESENT);
 }
 
-bool ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_seq_ctl_vld(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_get_mpdu_seq_ctl_vld_qcn9274(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.qcn9274_compact.mpdu_start.info4,
                               RX_MPDU_START_INFO4_MPDU_SEQ_CTRL_VALID);
 }
 
-bool ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_fc_valid(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_get_mpdu_fc_valid_qcn9274(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.qcn9274_compact.mpdu_start.info4,
                               RX_MPDU_START_INFO4_MPDU_FCTRL_VALID);
 }
 
-u16 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_start_seq_no(struct hal_rx_desc *desc)
+u16 ath12k_hal_rx_desc_get_mpdu_start_seq_no_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.mpdu_start.info4,
                             RX_MPDU_START_INFO4_MPDU_SEQ_NUM);
 }
 
-u16 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_len(struct hal_rx_desc *desc)
+u16 ath12k_hal_rx_desc_get_msdu_len_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.msdu_end.info10,
                             RX_MSDU_END_INFO10_MSDU_LENGTH);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_sgi(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_sgi_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.msdu_end.info12,
                             RX_MSDU_END_INFO12_SGI);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_rate_mcs(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_rate_mcs_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.msdu_end.info12,
                             RX_MSDU_END_INFO12_RATE_MCS);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_rx_bw(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_rx_bw_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.msdu_end.info12,
                             RX_MSDU_END_INFO12_RECV_BW);
 }
 
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_freq(struct hal_rx_desc *desc)
+u32 ath12k_hal_rx_desc_get_msdu_freq_qcn9274(struct hal_rx_desc *desc)
 {
        return __le32_to_cpu(desc->u.qcn9274_compact.msdu_end.phy_meta_data);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_pkt_type(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_pkt_type_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.msdu_end.info12,
                             RX_MSDU_END_INFO12_PKT_TYPE);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_nss(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_nss_qcn9274(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.qcn9274_compact.msdu_end.info12,
                             RX_MSDU_END_INFO12_MIMO_SS_BITMAP);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_tid(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_mpdu_tid_qcn9274(struct hal_rx_desc *desc)
 {
        return le16_get_bits(desc->u.qcn9274_compact.msdu_end.info5,
                             RX_MSDU_END_INFO5_TID);
 }
 
-u16 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_peer_id(struct hal_rx_desc *desc)
+u16 ath12k_hal_rx_desc_get_mpdu_peer_id_qcn9274(struct hal_rx_desc *desc)
 {
        return __le16_to_cpu(desc->u.qcn9274_compact.mpdu_start.sw_peer_id);
 }
 
-void ath12k_hw_qcn9274_compact_rx_desc_copy_end_tlv(struct hal_rx_desc *fdesc,
-                                                   struct hal_rx_desc *ldesc)
+void ath12k_hal_rx_desc_copy_end_tlv_qcn9274(struct hal_rx_desc *fdesc,
+                                            struct hal_rx_desc *ldesc)
 {
        fdesc->u.qcn9274_compact.msdu_end = ldesc->u.qcn9274_compact.msdu_end;
 }
 
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_ppdu_id(struct hal_rx_desc *desc)
+u32 ath12k_hal_rx_desc_get_mpdu_ppdu_id_qcn9274(struct hal_rx_desc *desc)
 {
        return __le16_to_cpu(desc->u.qcn9274_compact.mpdu_start.phy_ppdu_id);
 }
 
-void ath12k_hw_qcn9274_compact_rx_desc_set_msdu_len(struct hal_rx_desc *desc, u16 len)
+void ath12k_hal_rx_desc_set_msdu_len_qcn9274(struct hal_rx_desc *desc, u16 len)
 {
        u32 info = __le32_to_cpu(desc->u.qcn9274_compact.msdu_end.info10);
 
@@ -137,85 +137,85 @@ void ath12k_hw_qcn9274_compact_rx_desc_set_msdu_len(struct hal_rx_desc *desc, u1
        desc->u.qcn9274_compact.msdu_end.info10 = __cpu_to_le32(info);
 }
 
-u8 *ath12k_hw_qcn9274_compact_rx_desc_get_msdu_payload(struct hal_rx_desc *desc)
+u8 *ath12k_hal_rx_desc_get_msdu_payload_qcn9274(struct hal_rx_desc *desc)
 {
        return &desc->u.qcn9274_compact.msdu_payload[0];
 }
 
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_start_offset(void)
+u32 ath12k_hal_rx_desc_get_mpdu_start_offset_qcn9274(void)
 {
        return offsetof(struct hal_rx_desc_qcn9274_compact, mpdu_start);
 }
 
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_end_offset(void)
+u32 ath12k_hal_rx_desc_get_msdu_end_offset_qcn9274(void)
 {
        return offsetof(struct hal_rx_desc_qcn9274_compact, msdu_end);
 }
 
-bool ath12k_hw_qcn9274_compact_rx_desc_mac_addr2_valid(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_mac_addr2_valid_qcn9274(struct hal_rx_desc *desc)
 {
        return __le32_to_cpu(desc->u.qcn9274_compact.mpdu_start.info4) &
                             RX_MPDU_START_INFO4_MAC_ADDR2_VALID;
 }
 
-u8 *ath12k_hw_qcn9274_compact_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc)
+u8 *ath12k_hal_rx_desc_mpdu_start_addr2_qcn9274(struct hal_rx_desc *desc)
 {
        return desc->u.qcn9274_compact.mpdu_start.addr2;
 }
 
-bool ath12k_hw_qcn9274_compact_rx_desc_is_da_mcbc(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_is_da_mcbc_qcn9274(struct hal_rx_desc *desc)
 {
        return __le16_to_cpu(desc->u.qcn9274_compact.msdu_end.info5) &
               RX_MSDU_END_INFO5_DA_IS_MCBC;
 }
 
-bool ath12k_hw_qcn9274_compact_dp_rx_h_msdu_done(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_h_msdu_done_qcn9274(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.qcn9274_compact.msdu_end.info14,
                               RX_MSDU_END_INFO14_MSDU_DONE);
 }
 
-bool ath12k_hw_qcn9274_compact_dp_rx_h_l4_cksum_fail(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_h_l4_cksum_fail_qcn9274(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.qcn9274_compact.msdu_end.info13,
                               RX_MSDU_END_INFO13_TCP_UDP_CKSUM_FAIL);
 }
 
-bool ath12k_hw_qcn9274_compact_dp_rx_h_ip_cksum_fail(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_h_ip_cksum_fail_qcn9274(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.qcn9274_compact.msdu_end.info13,
                               RX_MSDU_END_INFO13_IP_CKSUM_FAIL);
 }
 
-bool ath12k_hw_qcn9274_compact_dp_rx_h_is_decrypted(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_h_is_decrypted_qcn9274(struct hal_rx_desc *desc)
 {
        return (le32_get_bits(desc->u.qcn9274_compact.msdu_end.info14,
                              RX_MSDU_END_INFO14_DECRYPT_STATUS_CODE) ==
                        RX_DESC_DECRYPT_STATUS_CODE_OK);
 }
 
-u32 ath12k_hw_qcn9274_compact_get_rx_desc_size(void)
+u32 ath12k_hal_get_rx_desc_size_qcn9274(void)
 {
        return sizeof(struct hal_rx_desc_qcn9274_compact);
 }
 
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_src_link(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_src_link_qcn9274(struct hal_rx_desc *desc)
 {
        return le64_get_bits(desc->u.qcn9274_compact.msdu_end.msdu_end_tag,
                             RX_MSDU_END_64_TLV_SRC_LINK_ID);
 }
 
-u16 ath12k_hal_qcn9274_rx_mpdu_start_wmask_get(void)
+u16 ath12k_hal_rx_mpdu_start_wmask_get_qcn9274(void)
 {
        return QCN9274_MPDU_START_WMASK;
 }
 
-u32 ath12k_hal_qcn9274_rx_msdu_end_wmask_get(void)
+u32 ath12k_hal_rx_msdu_end_wmask_get_qcn9274(void)
 {
        return QCN9274_MSDU_END_WMASK;
 }
 
-u32 ath12k_hw_qcn9274_compact_dp_rx_h_mpdu_err(struct hal_rx_desc *desc)
+u32 ath12k_hal_rx_h_mpdu_err_qcn9274(struct hal_rx_desc *desc)
 {
        u32 info = __le32_to_cpu(desc->u.qcn9274_compact.msdu_end.info13);
        u32 errmap = 0;
@@ -244,9 +244,9 @@ u32 ath12k_hw_qcn9274_compact_dp_rx_h_mpdu_err(struct hal_rx_desc *desc)
        return errmap;
 }
 
-void ath12k_hw_qcn9274_compact_rx_desc_get_crypto_hdr(struct hal_rx_desc *desc,
-                                                     u8 *crypto_hdr,
-                                                     enum hal_encrypt_type enctype)
+void ath12k_hal_rx_desc_get_crypto_hdr_qcn9274(struct hal_rx_desc *desc,
+                                              u8 *crypto_hdr,
+                                              enum hal_encrypt_type enctype)
 {
        unsigned int key_id;
 
@@ -291,8 +291,8 @@ void ath12k_hw_qcn9274_compact_rx_desc_get_crypto_hdr(struct hal_rx_desc *desc,
                HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.qcn9274_compact.mpdu_start.pn[1]);
 }
 
-void ath12k_hw_qcn9274_compact_rx_desc_get_dot11_hdr(struct hal_rx_desc *desc,
-                                                    struct ieee80211_hdr *hdr)
+void ath12k_hal_rx_desc_get_dot11_hdr_qcn9274(struct hal_rx_desc *desc,
+                                             struct ieee80211_hdr *hdr)
 {
        hdr->frame_control = desc->u.qcn9274_compact.mpdu_start.frame_ctrl;
        hdr->duration_id = desc->u.qcn9274_compact.mpdu_start.duration;
index d066e5bc00dbc2233924e6e960f155fb3bc02486..562156bbd726d825073bd1286dd8a2d072225141 100644 (file)
 #include "../hal.h"
 #include "hal_rx.h"
 
-bool ath12k_hw_qcn9274_compact_rx_desc_get_first_msdu(struct hal_rx_desc *desc);
-bool ath12k_hw_qcn9274_compact_rx_desc_get_last_msdu(struct hal_rx_desc *desc);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_l3_pad_bytes(struct hal_rx_desc *desc);
-bool ath12k_hw_qcn9274_compact_rx_desc_encrypt_valid(struct hal_rx_desc *desc);
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_encrypt_type(struct hal_rx_desc *desc);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_decap_type(struct hal_rx_desc *desc);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_mesh_ctl(struct hal_rx_desc *desc);
-bool ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_seq_ctl_vld(struct hal_rx_desc *desc);
-bool ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_fc_valid(struct hal_rx_desc *desc);
-u16 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_start_seq_no(struct hal_rx_desc *desc);
-u16 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_len(struct hal_rx_desc *desc);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_sgi(struct hal_rx_desc *desc);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_rate_mcs(struct hal_rx_desc *desc);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_rx_bw(struct hal_rx_desc *desc);
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_freq(struct hal_rx_desc *desc);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_pkt_type(struct hal_rx_desc *desc);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_nss(struct hal_rx_desc *desc);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_tid(struct hal_rx_desc *desc);
-u16 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_peer_id(struct hal_rx_desc *desc);
-void ath12k_hw_qcn9274_compact_rx_desc_copy_end_tlv(struct hal_rx_desc *fdesc,
-                                                   struct hal_rx_desc *ldesc);
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_ppdu_id(struct hal_rx_desc *desc);
-void ath12k_hw_qcn9274_compact_rx_desc_set_msdu_len(struct hal_rx_desc *desc, u16 len);
-u8 *ath12k_hw_qcn9274_compact_rx_desc_get_msdu_payload(struct hal_rx_desc *desc);
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_start_offset(void);
-u32 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_end_offset(void);
-bool ath12k_hw_qcn9274_compact_rx_desc_mac_addr2_valid(struct hal_rx_desc *desc);
-u8 *ath12k_hw_qcn9274_compact_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc);
-bool ath12k_hw_qcn9274_compact_rx_desc_is_da_mcbc(struct hal_rx_desc *desc);
-bool ath12k_hw_qcn9274_compact_dp_rx_h_msdu_done(struct hal_rx_desc *desc);
-bool ath12k_hw_qcn9274_compact_dp_rx_h_l4_cksum_fail(struct hal_rx_desc *desc);
-bool ath12k_hw_qcn9274_compact_dp_rx_h_ip_cksum_fail(struct hal_rx_desc *desc);
-bool ath12k_hw_qcn9274_compact_dp_rx_h_is_decrypted(struct hal_rx_desc *desc);
-u32 ath12k_hw_qcn9274_compact_get_rx_desc_size(void);
-u8 ath12k_hw_qcn9274_compact_rx_desc_get_msdu_src_link(struct hal_rx_desc *desc);
-u16 ath12k_hal_qcn9274_rx_mpdu_start_wmask_get(void);
-u32 ath12k_hal_qcn9274_rx_msdu_end_wmask_get(void);
-u32 ath12k_hw_qcn9274_compact_dp_rx_h_mpdu_err(struct hal_rx_desc *desc);
-void ath12k_hw_qcn9274_compact_rx_desc_get_crypto_hdr(struct hal_rx_desc *desc,
-                                                     u8 *crypto_hdr,
-                                                     enum hal_encrypt_type enctype);
-void ath12k_hw_qcn9274_compact_rx_desc_get_dot11_hdr(struct hal_rx_desc *desc,
-                                                    struct ieee80211_hdr *hdr);
+bool ath12k_hal_rx_desc_get_first_msdu_qcn9274(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_get_last_msdu_qcn9274(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_l3_pad_bytes_qcn9274(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_encrypt_valid_qcn9274(struct hal_rx_desc *desc);
+u32 ath12k_hal_rx_desc_get_encrypt_type_qcn9274(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_decap_type_qcn9274(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_mesh_ctl_qcn9274(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_get_mpdu_seq_ctl_vld_qcn9274(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_get_mpdu_fc_valid_qcn9274(struct hal_rx_desc *desc);
+u16 ath12k_hal_rx_desc_get_mpdu_start_seq_no_qcn9274(struct hal_rx_desc *desc);
+u16 ath12k_hal_rx_desc_get_msdu_len_qcn9274(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_sgi_qcn9274(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_rate_mcs_qcn9274(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_rx_bw_qcn9274(struct hal_rx_desc *desc);
+u32 ath12k_hal_rx_desc_get_msdu_freq_qcn9274(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_pkt_type_qcn9274(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_nss_qcn9274(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_mpdu_tid_qcn9274(struct hal_rx_desc *desc);
+u16 ath12k_hal_rx_desc_get_mpdu_peer_id_qcn9274(struct hal_rx_desc *desc);
+void ath12k_hal_rx_desc_copy_end_tlv_qcn9274(struct hal_rx_desc *fdesc,
+                                            struct hal_rx_desc *ldesc);
+u32 ath12k_hal_rx_desc_get_mpdu_ppdu_id_qcn9274(struct hal_rx_desc *desc);
+void ath12k_hal_rx_desc_set_msdu_len_qcn9274(struct hal_rx_desc *desc, u16 len);
+u8 *ath12k_hal_rx_desc_get_msdu_payload_qcn9274(struct hal_rx_desc *desc);
+u32 ath12k_hal_rx_desc_get_mpdu_start_offset_qcn9274(void);
+u32 ath12k_hal_rx_desc_get_msdu_end_offset_qcn9274(void);
+bool ath12k_hal_rx_desc_mac_addr2_valid_qcn9274(struct hal_rx_desc *desc);
+u8 *ath12k_hal_rx_desc_mpdu_start_addr2_qcn9274(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_is_da_mcbc_qcn9274(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_h_msdu_done_qcn9274(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_h_l4_cksum_fail_qcn9274(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_h_ip_cksum_fail_qcn9274(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_h_is_decrypted_qcn9274(struct hal_rx_desc *desc);
+u32 ath12k_hal_get_rx_desc_size_qcn9274(void);
+u8 ath12k_hal_rx_desc_get_msdu_src_link_qcn9274(struct hal_rx_desc *desc);
+u16 ath12k_hal_rx_mpdu_start_wmask_get_qcn9274(void);
+u32 ath12k_hal_rx_msdu_end_wmask_get_qcn9274(void);
+u32 ath12k_hal_rx_h_mpdu_err_qcn9274(struct hal_rx_desc *desc);
+void ath12k_hal_rx_desc_get_crypto_hdr_qcn9274(struct hal_rx_desc *desc,
+                                              u8 *crypto_hdr,
+                                              enum hal_encrypt_type enctype);
+void ath12k_hal_rx_desc_get_dot11_hdr_qcn9274(struct hal_rx_desc *desc,
+                                             struct ieee80211_hdr *hdr);
 #endif
index 1e23665aabc9182cc753bd70ce5360daee679e11..11b03452494c5cfbeb610659e72cc5515db09d24 100644 (file)
 #include "hal_desc.h"
 #include "hal_wcn7850.h"
 
-bool ath12k_hw_wcn7850_rx_desc_get_first_msdu(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_get_first_msdu_wcn7850(struct hal_rx_desc *desc)
 {
        return !!le16_get_bits(desc->u.wcn7850.msdu_end.info5,
                               RX_MSDU_END_INFO5_FIRST_MSDU);
 }
 
-bool ath12k_hw_wcn7850_rx_desc_get_last_msdu(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_get_last_msdu_wcn7850(struct hal_rx_desc *desc)
 {
        return !!le16_get_bits(desc->u.wcn7850.msdu_end.info5,
                               RX_MSDU_END_INFO5_LAST_MSDU);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_l3_pad_bytes(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_l3_pad_bytes_wcn7850(struct hal_rx_desc *desc)
 {
        return le16_get_bits(desc->u.wcn7850.msdu_end.info5,
                            RX_MSDU_END_INFO5_L3_HDR_PADDING);
 }
 
-bool ath12k_hw_wcn7850_rx_desc_encrypt_valid(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_encrypt_valid_wcn7850(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.wcn7850.mpdu_start.info4,
                               RX_MPDU_START_INFO4_ENCRYPT_INFO_VALID);
 }
 
-u32 ath12k_hw_wcn7850_rx_desc_get_encrypt_type(struct hal_rx_desc *desc)
+u32 ath12k_hal_rx_desc_get_encrypt_type_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.mpdu_start.info2,
                             RX_MPDU_START_INFO2_ENC_TYPE);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_decap_type(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_decap_type_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.msdu_end.info11,
                             RX_MSDU_END_INFO11_DECAP_FORMAT);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_mesh_ctl(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_mesh_ctl_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.msdu_end.info11,
                             RX_MSDU_END_INFO11_MESH_CTRL_PRESENT);
 }
 
-bool ath12k_hw_wcn7850_rx_desc_get_mpdu_seq_ctl_vld(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_get_mpdu_seq_ctl_vld_wcn7850(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.wcn7850.mpdu_start.info4,
                               RX_MPDU_START_INFO4_MPDU_SEQ_CTRL_VALID);
 }
 
-bool ath12k_hw_wcn7850_rx_desc_get_mpdu_fc_valid(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_get_mpdu_fc_valid_wcn7850(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.wcn7850.mpdu_start.info4,
                               RX_MPDU_START_INFO4_MPDU_FCTRL_VALID);
 }
 
-u16 ath12k_hw_wcn7850_rx_desc_get_mpdu_start_seq_no(struct hal_rx_desc *desc)
+u16 ath12k_hal_rx_desc_get_mpdu_start_seq_no_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.mpdu_start.info4,
                             RX_MPDU_START_INFO4_MPDU_SEQ_NUM);
 }
 
-u16 ath12k_hw_wcn7850_rx_desc_get_msdu_len(struct hal_rx_desc *desc)
+u16 ath12k_hal_rx_desc_get_msdu_len_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.msdu_end.info10,
                             RX_MSDU_END_INFO10_MSDU_LENGTH);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_sgi(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_sgi_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.msdu_end.info12,
                             RX_MSDU_END_INFO12_SGI);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_rate_mcs(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_rate_mcs_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.msdu_end.info12,
                             RX_MSDU_END_INFO12_RATE_MCS);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_rx_bw(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_rx_bw_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.msdu_end.info12,
                             RX_MSDU_END_INFO12_RECV_BW);
 }
 
-u32 ath12k_hw_wcn7850_rx_desc_get_msdu_freq(struct hal_rx_desc *desc)
+u32 ath12k_hal_rx_desc_get_msdu_freq_wcn7850(struct hal_rx_desc *desc)
 {
        return __le32_to_cpu(desc->u.wcn7850.msdu_end.phy_meta_data);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_pkt_type(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_pkt_type_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.msdu_end.info12,
                             RX_MSDU_END_INFO12_PKT_TYPE);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_nss(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_nss_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.msdu_end.info12,
                             RX_MSDU_END_INFO12_MIMO_SS_BITMAP);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_mpdu_tid(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_mpdu_tid_wcn7850(struct hal_rx_desc *desc)
 {
        return le32_get_bits(desc->u.wcn7850.mpdu_start.info2,
                             RX_MPDU_START_INFO2_TID);
 }
 
-u16 ath12k_hw_wcn7850_rx_desc_get_mpdu_peer_id(struct hal_rx_desc *desc)
+u16 ath12k_hal_rx_desc_get_mpdu_peer_id_wcn7850(struct hal_rx_desc *desc)
 {
        return __le16_to_cpu(desc->u.wcn7850.mpdu_start.sw_peer_id);
 }
 
-void ath12k_hw_wcn7850_rx_desc_copy_end_tlv(struct hal_rx_desc *fdesc,
-                                           struct hal_rx_desc *ldesc)
+void ath12k_hal_rx_desc_copy_end_tlv_wcn7850(struct hal_rx_desc *fdesc,
+                                            struct hal_rx_desc *ldesc)
 {
        memcpy(&fdesc->u.wcn7850.msdu_end, &ldesc->u.wcn7850.msdu_end,
               sizeof(struct rx_msdu_end_qcn9274));
 }
 
-u32 ath12k_hw_wcn7850_rx_desc_get_mpdu_start_tag(struct hal_rx_desc *desc)
+u32 ath12k_hal_rx_desc_get_mpdu_start_tag_wcn7850(struct hal_rx_desc *desc)
 {
        return le64_get_bits(desc->u.wcn7850.mpdu_start_tag,
                            HAL_TLV_HDR_TAG);
 }
 
-u32 ath12k_hw_wcn7850_rx_desc_get_mpdu_ppdu_id(struct hal_rx_desc *desc)
+u32 ath12k_hal_rx_desc_get_mpdu_ppdu_id_wcn7850(struct hal_rx_desc *desc)
 {
        return __le16_to_cpu(desc->u.wcn7850.mpdu_start.phy_ppdu_id);
 }
 
-void ath12k_hw_wcn7850_rx_desc_set_msdu_len(struct hal_rx_desc *desc, u16 len)
+void ath12k_hal_rx_desc_set_msdu_len_wcn7850(struct hal_rx_desc *desc, u16 len)
 {
        u32 info = __le32_to_cpu(desc->u.wcn7850.msdu_end.info10);
 
@@ -147,74 +147,74 @@ void ath12k_hw_wcn7850_rx_desc_set_msdu_len(struct hal_rx_desc *desc, u16 len)
        desc->u.wcn7850.msdu_end.info10 = __cpu_to_le32(info);
 }
 
-u8 *ath12k_hw_wcn7850_rx_desc_get_msdu_payload(struct hal_rx_desc *desc)
+u8 *ath12k_hal_rx_desc_get_msdu_payload_wcn7850(struct hal_rx_desc *desc)
 {
        return &desc->u.wcn7850.msdu_payload[0];
 }
 
-u32 ath12k_hw_wcn7850_rx_desc_get_mpdu_start_offset(void)
+u32 ath12k_hal_rx_desc_get_mpdu_start_offset_wcn7850(void)
 {
        return offsetof(struct hal_rx_desc_wcn7850, mpdu_start_tag);
 }
 
-u32 ath12k_hw_wcn7850_rx_desc_get_msdu_end_offset(void)
+u32 ath12k_hal_rx_desc_get_msdu_end_offset_wcn7850(void)
 {
        return offsetof(struct hal_rx_desc_wcn7850, msdu_end_tag);
 }
 
-bool ath12k_hw_wcn7850_rx_desc_mac_addr2_valid(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_mac_addr2_valid_wcn7850(struct hal_rx_desc *desc)
 {
        return __le32_to_cpu(desc->u.wcn7850.mpdu_start.info4) &
               RX_MPDU_START_INFO4_MAC_ADDR2_VALID;
 }
 
-u8 *ath12k_hw_wcn7850_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc)
+u8 *ath12k_hal_rx_desc_mpdu_start_addr2_wcn7850(struct hal_rx_desc *desc)
 {
        return desc->u.wcn7850.mpdu_start.addr2;
 }
 
-bool ath12k_hw_wcn7850_rx_desc_is_da_mcbc(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_desc_is_da_mcbc_wcn7850(struct hal_rx_desc *desc)
 {
        return __le32_to_cpu(desc->u.wcn7850.msdu_end.info13) &
               RX_MSDU_END_INFO13_MCAST_BCAST;
 }
 
-bool ath12k_hw_wcn7850_dp_rx_h_msdu_done(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_h_msdu_done_wcn7850(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.wcn7850.msdu_end.info14,
                               RX_MSDU_END_INFO14_MSDU_DONE);
 }
 
-bool ath12k_hw_wcn7850_dp_rx_h_l4_cksum_fail(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_h_l4_cksum_fail_wcn7850(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.wcn7850.msdu_end.info13,
                               RX_MSDU_END_INFO13_TCP_UDP_CKSUM_FAIL);
 }
 
-bool ath12k_hw_wcn7850_dp_rx_h_ip_cksum_fail(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_h_ip_cksum_fail_wcn7850(struct hal_rx_desc *desc)
 {
        return !!le32_get_bits(desc->u.wcn7850.msdu_end.info13,
                              RX_MSDU_END_INFO13_IP_CKSUM_FAIL);
 }
 
-bool ath12k_hw_wcn7850_dp_rx_h_is_decrypted(struct hal_rx_desc *desc)
+bool ath12k_hal_rx_h_is_decrypted_wcn7850(struct hal_rx_desc *desc)
 {
        return (le32_get_bits(desc->u.wcn7850.msdu_end.info14,
                              RX_MSDU_END_INFO14_DECRYPT_STATUS_CODE) ==
                              RX_DESC_DECRYPT_STATUS_CODE_OK);
 }
 
-u32 ath12k_hw_wcn7850_get_rx_desc_size(void)
+u32 ath12k_hal_get_rx_desc_size_wcn7850(void)
 {
        return sizeof(struct hal_rx_desc_wcn7850);
 }
 
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_src_link(struct hal_rx_desc *desc)
+u8 ath12k_hal_rx_desc_get_msdu_src_link_wcn7850(struct hal_rx_desc *desc)
 {
        return 0;
 }
 
-u32 ath12k_hw_wcn7850_dp_rx_h_mpdu_err(struct hal_rx_desc *desc)
+u32 ath12k_hal_rx_h_mpdu_err_wcn7850(struct hal_rx_desc *desc)
 {
        u32 info = __le32_to_cpu(desc->u.wcn7850.msdu_end.info13);
        u32 errmap = 0;
@@ -243,9 +243,9 @@ u32 ath12k_hw_wcn7850_dp_rx_h_mpdu_err(struct hal_rx_desc *desc)
        return errmap;
 }
 
-void ath12k_hw_wcn7850_rx_desc_get_crypto_hdr(struct hal_rx_desc *desc,
-                                             u8 *crypto_hdr,
-                                             enum hal_encrypt_type enctype)
+void ath12k_hal_rx_desc_get_crypto_hdr_wcn7850(struct hal_rx_desc *desc,
+                                              u8 *crypto_hdr,
+                                              enum hal_encrypt_type enctype)
 {
        unsigned int key_id;
 
@@ -286,8 +286,8 @@ void ath12k_hw_wcn7850_rx_desc_get_crypto_hdr(struct hal_rx_desc *desc,
        crypto_hdr[7] = HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.wcn7850.mpdu_start.pn[1]);
 }
 
-void ath12k_hw_wcn7850_rx_desc_get_dot11_hdr(struct hal_rx_desc *desc,
-                                            struct ieee80211_hdr *hdr)
+void ath12k_hal_rx_desc_get_dot11_hdr_wcn7850(struct hal_rx_desc *desc,
+                                             struct ieee80211_hdr *hdr)
 {
        hdr->frame_control = desc->u.wcn7850.mpdu_start.frame_ctrl;
        hdr->duration_id = desc->u.wcn7850.mpdu_start.duration;
index a5395a00538345a73ac60772d34e90a53e89810c..c9a6b7ffb60784c7699ef49fbdd5ebe339257530 100644 (file)
 #include "../hal.h"
 #include "hal_rx.h"
 
-bool ath12k_hw_wcn7850_rx_desc_get_first_msdu(struct hal_rx_desc *desc);
-bool ath12k_hw_wcn7850_rx_desc_get_last_msdu(struct hal_rx_desc *desc);
-u8 ath12k_hw_wcn7850_rx_desc_get_l3_pad_bytes(struct hal_rx_desc *desc);
-bool ath12k_hw_wcn7850_rx_desc_encrypt_valid(struct hal_rx_desc *desc);
-u32 ath12k_hw_wcn7850_rx_desc_get_encrypt_type(struct hal_rx_desc *desc);
-u8 ath12k_hw_wcn7850_rx_desc_get_decap_type(struct hal_rx_desc *desc);
-u8 ath12k_hw_wcn7850_rx_desc_get_mesh_ctl(struct hal_rx_desc *desc);
-bool ath12k_hw_wcn7850_rx_desc_get_mpdu_seq_ctl_vld(struct hal_rx_desc *desc);
-bool ath12k_hw_wcn7850_rx_desc_get_mpdu_fc_valid(struct hal_rx_desc *desc);
-u16 ath12k_hw_wcn7850_rx_desc_get_mpdu_start_seq_no(struct hal_rx_desc *desc);
-u16 ath12k_hw_wcn7850_rx_desc_get_msdu_len(struct hal_rx_desc *desc);
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_sgi(struct hal_rx_desc *desc);
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_rate_mcs(struct hal_rx_desc *desc);
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_rx_bw(struct hal_rx_desc *desc);
-u32 ath12k_hw_wcn7850_rx_desc_get_msdu_freq(struct hal_rx_desc *desc);
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_pkt_type(struct hal_rx_desc *desc);
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_nss(struct hal_rx_desc *desc);
-u8 ath12k_hw_wcn7850_rx_desc_get_mpdu_tid(struct hal_rx_desc *desc);
-u16 ath12k_hw_wcn7850_rx_desc_get_mpdu_peer_id(struct hal_rx_desc *desc);
-void ath12k_hw_wcn7850_rx_desc_copy_end_tlv(struct hal_rx_desc *fdesc,
-                                           struct hal_rx_desc *ldesc);
-u32 ath12k_hw_wcn7850_rx_desc_get_mpdu_start_tag(struct hal_rx_desc *desc);
-u32 ath12k_hw_wcn7850_rx_desc_get_mpdu_ppdu_id(struct hal_rx_desc *desc);
-void ath12k_hw_wcn7850_rx_desc_set_msdu_len(struct hal_rx_desc *desc, u16 len);
-u8 *ath12k_hw_wcn7850_rx_desc_get_msdu_payload(struct hal_rx_desc *desc);
-u32 ath12k_hw_wcn7850_rx_desc_get_mpdu_start_offset(void);
-u32 ath12k_hw_wcn7850_rx_desc_get_msdu_end_offset(void);
-bool ath12k_hw_wcn7850_rx_desc_mac_addr2_valid(struct hal_rx_desc *desc);
-u8 *ath12k_hw_wcn7850_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc);
-bool ath12k_hw_wcn7850_rx_desc_is_da_mcbc(struct hal_rx_desc *desc);
-bool ath12k_hw_wcn7850_dp_rx_h_msdu_done(struct hal_rx_desc *desc);
-bool ath12k_hw_wcn7850_dp_rx_h_l4_cksum_fail(struct hal_rx_desc *desc);
-bool ath12k_hw_wcn7850_dp_rx_h_ip_cksum_fail(struct hal_rx_desc *desc);
-bool ath12k_hw_wcn7850_dp_rx_h_is_decrypted(struct hal_rx_desc *desc);
-u32 ath12k_hw_wcn7850_get_rx_desc_size(void);
-u8 ath12k_hw_wcn7850_rx_desc_get_msdu_src_link(struct hal_rx_desc *desc);
-u32 ath12k_hw_wcn7850_dp_rx_h_mpdu_err(struct hal_rx_desc *desc);
-void ath12k_hw_wcn7850_rx_desc_get_crypto_hdr(struct hal_rx_desc *desc,
-                                             u8 *crypto_hdr,
-                                             enum hal_encrypt_type enctype);
-void ath12k_hw_wcn7850_rx_desc_get_dot11_hdr(struct hal_rx_desc *desc,
-                                            struct ieee80211_hdr *hdr);
+bool ath12k_hal_rx_desc_get_first_msdu_wcn7850(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_get_last_msdu_wcn7850(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_l3_pad_bytes_wcn7850(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_encrypt_valid_wcn7850(struct hal_rx_desc *desc);
+u32 ath12k_hal_rx_desc_get_encrypt_type_wcn7850(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_decap_type_wcn7850(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_mesh_ctl_wcn7850(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_get_mpdu_seq_ctl_vld_wcn7850(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_get_mpdu_fc_valid_wcn7850(struct hal_rx_desc *desc);
+u16 ath12k_hal_rx_desc_get_mpdu_start_seq_no_wcn7850(struct hal_rx_desc *desc);
+u16 ath12k_hal_rx_desc_get_msdu_len_wcn7850(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_sgi_wcn7850(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_rate_mcs_wcn7850(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_rx_bw_wcn7850(struct hal_rx_desc *desc);
+u32 ath12k_hal_rx_desc_get_msdu_freq_wcn7850(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_pkt_type_wcn7850(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_msdu_nss_wcn7850(struct hal_rx_desc *desc);
+u8 ath12k_hal_rx_desc_get_mpdu_tid_wcn7850(struct hal_rx_desc *desc);
+u16 ath12k_hal_rx_desc_get_mpdu_peer_id_wcn7850(struct hal_rx_desc *desc);
+void ath12k_hal_rx_desc_copy_end_tlv_wcn7850(struct hal_rx_desc *fdesc,
+                                            struct hal_rx_desc *ldesc);
+u32 ath12k_hal_rx_desc_get_mpdu_start_tag_wcn7850(struct hal_rx_desc *desc);
+u32 ath12k_hal_rx_desc_get_mpdu_ppdu_id_wcn7850(struct hal_rx_desc *desc);
+void ath12k_hal_rx_desc_set_msdu_len_wcn7850(struct hal_rx_desc *desc, u16 len);
+u8 *ath12k_hal_rx_desc_get_msdu_payload_wcn7850(struct hal_rx_desc *desc);
+u32 ath12k_hal_rx_desc_get_mpdu_start_offset_wcn7850(void);
+u32 ath12k_hal_rx_desc_get_msdu_end_offset_wcn7850(void);
+bool ath12k_hal_rx_desc_mac_addr2_valid_wcn7850(struct hal_rx_desc *desc);
+u8 *ath12k_hal_rx_desc_mpdu_start_addr2_wcn7850(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_desc_is_da_mcbc_wcn7850(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_h_msdu_done_wcn7850(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_h_l4_cksum_fail_wcn7850(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_h_ip_cksum_fail_wcn7850(struct hal_rx_desc *desc);
+bool ath12k_hal_rx_h_is_decrypted_wcn7850(struct hal_rx_desc *desc);
+u32 ath12k_hal_get_rx_desc_size_wcn7850(void);
+u8 ath12k_hal_rx_desc_get_msdu_src_link_wcn7850(struct hal_rx_desc *desc);
+u32 ath12k_hal_rx_h_mpdu_err_wcn7850(struct hal_rx_desc *desc);
+void ath12k_hal_rx_desc_get_crypto_hdr_wcn7850(struct hal_rx_desc *desc,
+                                              u8 *crypto_hdr,
+                                              enum hal_encrypt_type enctype);
+void ath12k_hal_rx_desc_get_dot11_hdr_wcn7850(struct hal_rx_desc *desc,
+                                             struct ieee80211_hdr *hdr);
 #endif