misc: amd-sbi: CPUID/MCAMSR protocol for Revision 0x21

- CPUID and MCAMSR protocol for newer platform with revision
  0x21 and later is modified as per two byte register address size.
- Modify the CPUID and MCAMSR protocol to return error, "-EOPNOTSUPP",
  for revision 0x21.
- Next set of patches will add support for CPUID and MCAMSR for Turin and
  later platforms.

Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Link: https://patch.msgid.link/20250915103649.1705078-4-akshay.gupta@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/misc/amd-sbi/rmi-core.c b/drivers/misc/amd-sbi/rmi-core.c
index 3dec2fc00124497ce6df74c233d35e22663818c7..bf534ba757dbe4edd70dfee91eeaf8b49be855b5 100644 (file)
--- a/drivers/misc/amd-sbi/rmi-core.c
+++ b/drivers/misc/amd-sbi/rmi-core.c
@@ -122,8 +122,8 @@ static int rmi_cpuid_read(struct sbrmi_data *data,
                if (ret < 0)
                        goto exit_unlock;
        }
-       /* CPUID protocol for REV 0x10 is not supported*/
-       if (data->rev == 0x10) {
+       /* CPUID protocol for REV 0x20 is only supported*/
+       if (data->rev != 0x20) {
                ret = -EOPNOTSUPP;
                goto exit_unlock;
        }
@@ -203,8 +203,8 @@ static int rmi_mca_msr_read(struct sbrmi_data *data,
                if (ret < 0)
                        goto exit_unlock;
        }
-       /* MCA MSR protocol for REV 0x10 is not supported*/
-       if (data->rev == 0x10) {
+       /* MCA MSR protocol for REV 0x20 is supported*/
+       if (data->rev != 0x20) {
                ret = -EOPNOTSUPP;
                goto exit_unlock;
        }