+Tue Jun 4 13:09:18 CEST 2002 Jan Hubicka <jh@suse.cz>
+
+ * loop.c (emit_prefetch_instructions): Properly place the address
+ computation.
+
+ * dwarf2out.c (output_call_frame_info): Do not skip unwind info
+ when flag_asynchronous_unwind_tables is set.
+
+ * i386-protos.h (x86_output_mi_thunk): Declare.
+ * unix.h (ASM_OUTPUT_MI_THUNK): Move offline to ...
+ * i386.c (x86_output_mi_thunk): ... here; handle 64bits.
+
+ * config/i386/i386.c (ix86_expand_int_movcc): Truncate to proper
+ mode.
+
+ * i386.md (movabsdi): Kill broken alternative.
+
+ * i386.c (dbx64_register_map): Fix typo
+
2002-06-03 Jason Thorpe <thorpej@wasabisystems.com>
* config/rs6000/netbsd.h (DRAFT_V4_STRUCT_RET): Remove.
extern unsigned int i386_pe_section_type_flags PARAMS ((tree, const char *,
int));
extern void i386_pe_asm_named_section PARAMS ((const char *, unsigned int));
+extern void x86_output_mi_thunk PARAMS ((FILE *, int, tree));
#endif
int const dbx64_register_map[FIRST_PSEUDO_REGISTER] =
{
0, 1, 2, 3, 4, 5, 6, 7, /* general regs */
- 33, 34, 35, 36, 37, 38, 39, 40 /* fp regs */
+ 33, 34, 35, 36, 37, 38, 39, 40, /* fp regs */
-1, -1, -1, -1, -1, /* arg, flags, fpsr, dir, frame */
17, 18, 19, 20, 21, 22, 23, 24, /* SSE */
41, 42, 43, 44, 45, 46, 47, 48, /* MMX */
while (pos < FIRST_PSEUDO_REGISTER)
reg_alloc_order [pos++] = 0;
}
+
+void
+x86_output_mi_thunk (file, delta, function)
+ FILE *file;
+ int delta;
+ tree function;
+{
+ tree parm;
+ rtx xops[3];
+
+ if (ix86_regparm > 0)
+ parm = TYPE_ARG_TYPES (TREE_TYPE (function));
+ else
+ parm = NULL_TREE;
+ for (; parm; parm = TREE_CHAIN (parm))
+ if (TREE_VALUE (parm) == void_type_node)
+ break;
+
+ xops[0] = GEN_INT (delta);
+ if (TARGET_64BIT)
+ {
+ int n = aggregate_value_p (TREE_TYPE (TREE_TYPE (function))) != 0;
+ xops[1] = gen_rtx_REG (DImode, x86_64_int_parameter_registers[n]);
+ output_asm_insn ("add{q} {%0, %1|%1, %0}", xops);
+ if (flag_pic)
+ {
+ fprintf (file, "\tjmp *");
+ assemble_name (file, XSTR (XEXP (DECL_RTL (function), 0), 0));
+ fprintf (file, "@GOTPCREL(%%rip)\n");
+ }
+ else
+ {
+ fprintf (file, "\tjmp ");
+ assemble_name (file, XSTR (XEXP (DECL_RTL (function), 0), 0));
+ fprintf (file, "\n");
+ }
+ }
+ else
+ {
+ if (parm)
+ xops[1] = gen_rtx_REG (SImode, 0);
+ else if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function))))
+ xops[1] = gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx, 8));
+ else
+ xops[1] = gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx, 4));
+ output_asm_insn ("add{l} {%0, %1|%1, %0}", xops);
+
+ if (flag_pic)
+ {
+ xops[0] = pic_offset_table_rtx;
+ xops[1] = gen_label_rtx ();
+ xops[2] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
+
+ if (ix86_regparm > 2)
+ abort ();
+ output_asm_insn ("push{l}\t%0", xops);
+ output_asm_insn ("call\t%P1", xops);
+ ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (xops[1]));
+ output_asm_insn ("pop{l}\t%0", xops);
+ output_asm_insn
+ ("add{l}\t{%2+[.-%P1], %0|%0, OFFSET FLAT: %2+[.-%P1]}", xops);
+ xops[0] = gen_rtx_MEM (SImode, XEXP (DECL_RTL (function), 0));
+ output_asm_insn
+ ("mov{l}\t{%0@GOT(%%ebx), %%ecx|%%ecx, %0@GOT[%%ebx]}", xops);
+ asm_fprintf (file, "\tpop{l\t%%ebx|\t%%ebx}\n");
+ asm_fprintf (file, "\tjmp\t{*%%ecx|%%ecx}\n");
+ }
+ else
+ {
+ fprintf (file, "\tjmp ");
+ assemble_name (file, XSTR (XEXP (DECL_RTL (function), 0), 0));
+ fprintf (file, "\n");
+ }
+ }
+}
;; We fake an second form of instruction to force reload to load address
;; into register when rax is not available
(define_insn "*movabsdi_1_rex64"
- [(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r,r"))
- (match_operand:DI 1 "nonmemory_operand" "a,er,i"))]
+ [(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
+ (match_operand:DI 1 "nonmemory_operand" "a,er"))]
"TARGET_64BIT"
"@
movabs{q}\t{%1, %P0|%P0, %1}
- mov{q}\t{%1, %a0|%a0, %1}
- movabs{q}\t{%1, %a0|%a0, %1}"
+ mov{q}\t{%1, %a0|%a0, %1}"
[(set_attr "type" "imov")
- (set_attr "modrm" "0,*,*")
- (set_attr "length_address" "8,0,0")
- (set_attr "length_immediate" "0,*,*")
+ (set_attr "modrm" "0,*")
+ (set_attr "length_address" "8,0")
+ (set_attr "length_immediate" "0,*")
(set_attr "memory" "store")
(set_attr "mode" "DI")])
/* Output code to add DELTA to the first argument, and then jump to FUNCTION.
Used for C++ multiple inheritance. */
-#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
-do { \
- tree parm; \
- rtx xops[3]; \
- \
- if (ix86_regparm > 0) \
- parm = TYPE_ARG_TYPES (TREE_TYPE (function)); \
- else \
- parm = NULL_TREE; \
- for (; parm; parm = TREE_CHAIN (parm)) \
- if (TREE_VALUE (parm) == void_type_node) \
- break; \
- \
- xops[0] = GEN_INT (DELTA); \
- if (parm) \
- xops[1] = gen_rtx_REG (SImode, 0); \
- else if (aggregate_value_p (TREE_TYPE (TREE_TYPE (FUNCTION)))) \
- xops[1] = gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx, 8)); \
- else \
- xops[1] = gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx, 4)); \
- output_asm_insn ("add{l} {%0, %1|%1, %0}", xops); \
- \
- if (flag_pic && !TARGET_64BIT) \
- { \
- xops[0] = pic_offset_table_rtx; \
- xops[1] = gen_label_rtx (); \
- xops[2] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_"); \
- \
- if (ix86_regparm > 2) \
- abort (); \
- output_asm_insn ("push{l}\t%0", xops); \
- output_asm_insn ("call\t%P1", xops); \
- ASM_OUTPUT_INTERNAL_LABEL (FILE, "L", CODE_LABEL_NUMBER (xops[1])); \
- output_asm_insn ("pop{l}\t%0", xops); \
- output_asm_insn ("add{l}\t{%2+[.-%P1], %0|%0, OFFSET FLAT: %2+[.-%P1]}", xops); \
- xops[0] = gen_rtx_MEM (SImode, XEXP (DECL_RTL (FUNCTION), 0)); \
- output_asm_insn ("mov{l}\t{%0@GOT(%%ebx), %%ecx|%%ecx, %0@GOT[%%ebx]}",\
- xops); \
- asm_fprintf (FILE, "\tpop{l\t%%ebx|\t%%ebx}\n"); \
- asm_fprintf (FILE, "\tjmp\t{*%%ecx|%%ecx}\n"); \
- } \
- else if (flag_pic && TARGET_64BIT) \
- { \
- fprintf (FILE, "\tjmp *"); \
- assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
- fprintf (FILE, "@GOTPCREL(%%rip)\n"); \
- } \
- else \
- { \
- fprintf (FILE, "\tjmp "); \
- assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
- fprintf (FILE, "\n"); \
- } \
-} while (0)
+#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
+ x86_output_mi_thunk (FILE, DELTA, FUNCTION);
fde = &fde_table[i];
/* Don't emit EH unwind info for leaf functions that don't need it. */
- if (for_eh && fde->nothrow && ! fde->uses_eh_lsda)
+ if (!flag_asynchronous_unwind_tables && for_eh && fde->nothrow
+ && ! fde->uses_eh_lsda)
continue;
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, FDE_LABEL, for_eh + i * 2);
int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
rtx before_insn = info[i].giv->insn;
rtx prev_insn = PREV_INSN (info[i].giv->insn);
+ rtx seq;
/* We can save some effort by offsetting the address on
architectures with offsettable memory references. */
loc = reg;
}
+ start_sequence ();
/* Make sure the address operand is valid for prefetch. */
if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
(loc,
insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
loc = force_reg (Pmode, loc);
- emit_insn_before (gen_prefetch (loc, GEN_INT (info[i].write),
- GEN_INT (3)),
- before_insn);
+ emit_insn (gen_prefetch (loc, GEN_INT (info[i].write),
+ GEN_INT (3)));
+ seq = gen_sequence ();
+ end_sequence ();
+ emit_insn_before (seq, before_insn);
/* Check all insns emitted and record the new GIV
information. */
projects / thirdparty / gcc.git / commitdiff
