RISC-V: Tweak the asm check test of vx combine on GR2VR cost [NFC]

Tweak the asm check with define T uint8_t for adding more
vx test easily, as well as less possibility to make mistake.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Extract
	define T as type for testing.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
index 015b086666834017d5bc30c3ca19a259a3bc4928..47fa654e62d96bafb0c95852bd2c85dc337a8a10 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int16_t, +, add)
-DEF_VX_BINARY_CASE_0(int16_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int16_t, -, rsub);
+#define T int16_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
index f0a88e8da87a83025748e37864d821be906936c0..9e16eaf5930425e33578044f3e291198aa9f5d46 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int32_t, +, add)
-DEF_VX_BINARY_CASE_0(int32_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int32_t, -, rsub);
+#define T int32_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
index fbf9f6a930fb8dccec4513eb7d07a07921447aae..52271bee7710ddfa411d405cc4af34583a29c610 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int64_t, +, add)
-DEF_VX_BINARY_CASE_0(int64_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int64_t, -, rsub);
+#define T int64_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
index 55309308573ea299e453f450efcc8798c093a1de..ac822fb66c8c419a1d61bfa73431433a9e3f8e89 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int8_t, +, add)
-DEF_VX_BINARY_CASE_0(int8_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int8_t, -, rsub);
+#define T int8_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
index 15edd71a438e5aa10654235eb05669d238418ff2..f4e46b7e973e4808e4c05d807e695a2512fab1c1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint16_t, +, add)
-DEF_VX_BINARY_CASE_0(uint16_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint16_t, -, rsub);
+#define T uint16_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
index 992083e723538382c86b248d296520b399f36e94..9b83b6616192791c6b5d562fb4a214a9bc322792 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint32_t, +, add)
-DEF_VX_BINARY_CASE_0(uint32_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint32_t, -, rsub);
+#define T uint32_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
index bb445f6e0ffd7cfcede156d1ce16b385ef12858e..be807889d72932648b9ba41d08f5b97e063d3abf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint64_t, +, add)
-DEF_VX_BINARY_CASE_0(uint64_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint64_t, -, rsub);
+#define T uint64_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
index 73e144b06eee36103ccd3cdd9bdb120a56fed42e..5928c3f3f28685d790144a6b7f27469e610bcdc5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint8_t, +, add)
-DEF_VX_BINARY_CASE_0(uint8_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint8_t, -, rsub);
+#define T uint8_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
index c55eaaac278a2b378b1248caeaa5646ffaad3362..631f035d2e570f7b5d40cca0f7ad0b7c7e3ed13b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int16_t, +, add)
-DEF_VX_BINARY_CASE_0(int16_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int16_t, -, rsub);
+#define T int16_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
index 0a0258ccfee31d2f3f7159bb747982d168f890cd..bbef0a23ccc351159bf8a79063cb9c897b1a345f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int32_t, +, add)
-DEF_VX_BINARY_CASE_0(int32_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int32_t, -, rsub);
+#define T int32_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
index 4956315ee1469ef7cacc874418743ab979804a9e..f4999fe899e93b794183637b9e971cf4c370b09b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int64_t, +, add)
-DEF_VX_BINARY_CASE_0(int64_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int64_t, -, rsub);
+#define T int64_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
index c1fa3b605d7c030eacc98015a586142d4100899c..3ddfda0cfdbc1030d5f09b6ab21336fec18264aa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int8_t, +, add)
-DEF_VX_BINARY_CASE_0(int8_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int8_t, -, rsub);
+#define T int8_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
index 5dca3850240fb05c4eea3b4394776b35d722e1b7..a4e2eb8435811f97bb721dcfe99029e9829771f7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint16_t, +, add)
-DEF_VX_BINARY_CASE_0(uint16_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint16_t, -, rsub);
+#define T uint16_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
index 4460fc06d00a8dc8c9fd29c2788b0c662e2d5b78..87ea54d0d02385c988b5b18bde0a40609fee6a82 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint32_t, +, add)
-DEF_VX_BINARY_CASE_0(uint32_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint32_t, -, rsub);
+#define T uint32_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
index e8282c3d2198adb36abefec66209cefa211467c8..990145ccc3c085f2322ada5284f67d0730f6898a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint64_t, +, add)
-DEF_VX_BINARY_CASE_0(uint64_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int64_t, -, rsub);
+#define T uint64_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
index 7b744f1b460fd4daaa7fc9768028e7703a91f288..d1495a4c486786908ae75bd08abd0f6cf31c3917 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint8_t, +, add)
-DEF_VX_BINARY_CASE_0(uint8_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint8_t, -, rsub);
+#define T uint8_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
index b5f36ff3a44398c61bddc78cb31b0695e2a62ac2..9c3102a24c04768c2bf27f4db400402f1a2b4d3e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int16_t, +, add)
-DEF_VX_BINARY_CASE_0(int16_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int16_t, -, rsub);
+#define T int16_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
index 93ba98d57e9ce917b2da8f4aec25c4aeeaa13b50..7da01011ce751c3f2d52a7ac4b81e4a670632383 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int32_t, +, add)
-DEF_VX_BINARY_CASE_0(int32_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int32_t, -, rsub);
+#define T int32_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
index e73fbce0106760deb034ccee6117cbb205c6bfe5..7e77db986bfd534f4cc21475c47b76b56083ea0a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int64_t, +, add)
-DEF_VX_BINARY_CASE_0(int64_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int64_t, -, rsub);
+#define T int64_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
index 2a3a6f1884ba67e080549461f180bc77d9512a6c..957654fa1fe7083438667eaabb4155632e0c71cb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(int8_t, +, add)
-DEF_VX_BINARY_CASE_0(int8_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(int8_t, -, rsub);
+#define T int8_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
index 63358cd3354b7529cfac4393f516eb8eaec42b46..a62334adb4d0459e907a63b4ac58e36f22e9e537 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint16_t, +, add)
-DEF_VX_BINARY_CASE_0(uint16_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint16_t, -, rsub);
+#define T uint16_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
index 6ed098773c70bad2d8e2b2b95027c2ef941ba39e..d7b31e2b589e3a5b63717b6a5c393805c2bad852 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint32_t, +, add)
-DEF_VX_BINARY_CASE_0(uint32_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint32_t, -, rsub);
+#define T uint32_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
index f2bfe28f1a7d5ff7f4753981b93272f82caad309..22f555082797f4be18dc76e371fb3b26d0481e59 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint64_t, +, add)
-DEF_VX_BINARY_CASE_0(uint64_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint64_t, -, rsub);
+#define T uint64_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
index a89d4a002680861e76b945e4fa7931f9f92535ce..3473c5ffc6c978ad3280cfd629091578e18c1e13 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_0(uint8_t, +, add)
-DEF_VX_BINARY_CASE_0(uint8_t, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(uint8_t, -, rsub);
+#define T uint8_t
+
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
+DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
+DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
index 4d1085693133bc1eea97d94346b0567d92e9139a..6f59b07d236cc4ffa1cc130b5c3acc1ab8ef5417 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int16_t, +, add, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_CASE_1(int16_t, -, sub, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_REVERSE_CASE_1(int16_t, -, rsub, VX_BINARY_REVERSE_BODY_X16);
+#define T int16_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
index 410d9ffcfeaa246ad8cbc5795bf7e80aae37ce5f..69b2227d889aaa7126a01a224c1a8adbf647dcfa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int32_t, +, add, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_CASE_1(int32_t, -, sub, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_REVERSE_CASE_1(int32_t, -, rsub, VX_BINARY_REVERSE_BODY_X4);
+#define T int32_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X4);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
index 51b207055bd64022eeb7f5ae50400e4f9115b973..8ea88d4d75b9ba2b95d1aa0fce578b4f0127c4be 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int64_t, +, add, VX_BINARY_BODY)
-DEF_VX_BINARY_CASE_1(int64_t, -, sub, VX_BINARY_BODY)
-DEF_VX_BINARY_REVERSE_CASE_1(int64_t, -, rsub, VX_BINARY_REVERSE_BODY);
+#define T int64_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c
index ff7773daee34c832663f2ce853a1f9a2703a950f..ec937d6458e6ae4d1c144a3e890ee9b5da436921 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int8_t, +, add, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_CASE_1(int8_t, -, sub, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_REVERSE_CASE_1(int8_t, -, rsub, VX_BINARY_REVERSE_BODY_X16);
+#define T int8_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c
index 00110752964b0590b54300e70ebbd9d4d4d4ad4a..9d04f40ac90635eb80565184dccf03c1a0e72f0a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint16_t, +, add, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_CASE_1(uint16_t, -, sub, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_REVERSE_CASE_1(uint16_t, -, rsub, VX_BINARY_REVERSE_BODY_X16);
+#define T uint16_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c
index ecd405a357420657bff210c3fe25601514632322..af01bf5f82aad1a0d261db0ecb3911e66c5fa915 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint32_t, +, add, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_CASE_1(uint32_t, -, sub, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_REVERSE_CASE_1(uint32_t, -, rsub, VX_BINARY_REVERSE_BODY_X4);
+#define T uint32_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X4);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c
index b712addf689e921044f0580fa1fe3492917b1633..b83b31ddab9dec8e6bce7b140c49a1f963ac7063 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint64_t, +, add, VX_BINARY_BODY)
-DEF_VX_BINARY_CASE_1(uint64_t, -, sub, VX_BINARY_BODY)
-DEF_VX_BINARY_REVERSE_CASE_1(uint64_t, -, rsub, VX_BINARY_REVERSE_BODY);
+#define T uint64_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c
index 9c9f37d50c5b71db0b72762098b7b77e7052c2d3..dc7be4ca8e01fb4c668886ddaec3d9a91be1ad35 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint8_t, +, add, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_CASE_1(uint8_t, -, sub, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_REVERSE_CASE_1(uint8_t, -, rsub, VX_BINARY_REVERSE_BODY_X16);
+#define T uint8_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c
index 3f33c45fafb224a7b13b2eb2aa00fb5d41d8a03c..ebdae502298f96ba1f6e6a1ae35105c7ea9549a2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int16_t, +, add, VX_BINARY_BODY_X8)
-DEF_VX_BINARY_CASE_1(int16_t, -, sub, VX_BINARY_BODY_X8)
-DEF_VX_BINARY_REVERSE_CASE_1(int16_t, -, rsub, VX_BINARY_REVERSE_BODY_X8);
+#define T int16_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X8);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c
index 059cf0b1d2e0f04389b59e42e52c3cd6c32969e6..fadc0ce9dee67ea5b93bf9c8015f7c89cc096f4b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int32_t, +, add, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_CASE_1(int32_t, -, sub, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_REVERSE_CASE_1(int32_t, -, rsub, VX_BINARY_REVERSE_BODY_X4);
+#define T int32_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X4);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c
index 9ac1dd0671473c5ae8e3fc8d7a3959b2e763005c..c3529e98ab669c1d62d52358bc9ee1dd9e54cbd1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int64_t, +, add, VX_BINARY_BODY)
-DEF_VX_BINARY_CASE_1(int64_t, -, sub, VX_BINARY_BODY)
-DEF_VX_BINARY_REVERSE_CASE_1(int64_t, -, rsub, VX_BINARY_REVERSE_BODY);
+#define T int64_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c
index 63d0a820aa931549f9e888d655f6165f4da4e403..d196eb889b1f5585e8a4e078997cbbf97bba8f9a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int8_t, +, add, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_CASE_1(int8_t, -, sub, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_REVERSE_CASE_1(int8_t, -, rsub, VX_BINARY_REVERSE_BODY_X16);
+#define T int8_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c
index fe0ab0ea0818a85377bad0f82b3776b1eb724b2a..623a718f140fc477a0027377afda03e1eaba0e22 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint16_t, +, add, VX_BINARY_BODY_X8)
-DEF_VX_BINARY_CASE_1(uint16_t, -, sub, VX_BINARY_BODY_X8)
-DEF_VX_BINARY_REVERSE_CASE_1(uint16_t, -, rsub, VX_BINARY_REVERSE_BODY_X8);
+#define T uint16_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X8);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c
index 305f3564bb5cdaf0356afe3c20f247a2ee91b4a6..95cc0ff6e975d33009134eb75dd8914ecd2859be 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint32_t, +, add, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_CASE_1(uint32_t, -, sub, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_REVERSE_CASE_1(uint32_t, -, rsub, VX_BINARY_REVERSE_BODY_X4);
+#define T uint32_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X4);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c
index bb95764f914b9df60969a82d8253fbf017cc6649..16b7c9bb88d49087254d40572edee9feef9118a2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint64_t, +, add, VX_BINARY_BODY)
-DEF_VX_BINARY_CASE_1(uint64_t, -, sub, VX_BINARY_BODY)
-DEF_VX_BINARY_REVERSE_CASE_1(uint64_t, -, rsub, VX_BINARY_REVERSE_BODY);
+#define T uint64_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c
index 347752af9613fa5575314732609f18fc91bd658a..438eaec34945a79daadcce3ca83009d6c7358674 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint8_t, +, add, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_CASE_1(uint8_t, -, sub, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_REVERSE_CASE_1(uint8_t, -, rsub, VX_BINARY_REVERSE_BODY_X16);
+#define T uint8_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c
index ce1b40fd1740527603b17fd836657fabe069c652..65104e138209ffb932e5d34de4ada530159e502f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int16_t, +, add, VX_BINARY_BODY_X8)
-DEF_VX_BINARY_CASE_1(int16_t, -, sub, VX_BINARY_BODY_X8)
-DEF_VX_BINARY_REVERSE_CASE_1(int16_t, -, rsub, VX_BINARY_REVERSE_BODY_X8);
+#define T int16_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X8);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c
index 7326ded06f0e1fec410563c8938fdb645d277331..631b62f113ba419a6fcf6a6caaf5b49eb6be969e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int32_t, +, add, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_CASE_1(int32_t, -, sub, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_REVERSE_CASE_1(int32_t, -, rsub, VX_BINARY_REVERSE_BODY_X4);
+#define T int32_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X4);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c
index 7b8b63dd3cef5f79a2506dfc1f4117c847762622..64ea7416930368d7f11b28c143f1b60333197c5d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int64_t, +, add, VX_BINARY_BODY)
-DEF_VX_BINARY_CASE_1(int64_t, -, sub, VX_BINARY_BODY)
-DEF_VX_BINARY_REVERSE_CASE_1(int64_t, -, rsub, VX_BINARY_REVERSE_BODY);
+#define T int64_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c
index f440b7075dc2768ae8f58b02091109a3987857dd..2b26ce4f6a0c6e479fbd6600ad57a0cf3363b43c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(int8_t, +, add, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_CASE_1(int8_t, -, sub, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_REVERSE_CASE_1(int8_t, -, rsub, VX_BINARY_REVERSE_BODY_X16);
+#define T int8_t
+
+DEF_VX_BINARY_CASE_1(T, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(T, -, sub, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_REVERSE_CASE_1(T, -, rsub, VX_BINARY_REVERSE_BODY_X16);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c
index c36c5cb64165f495d79da04667a2ac7bb2db5e26..195118676169f926944c51d64c73c4079e130dc2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c
@@ -1,12 +1,13 @@
-
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=2" } */
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint16_t, +, add, VX_BINARY_BODY_X8)
-DEF_VX_BINARY_CASE_1(uint16_t, -, sub, VX_BINARY_BODY_X8)
-DEF_VX_BINARY_REVERSE_CASE_1(uint16_t, -, rsub, VX_BINARY_REVERSE_BODY_X8);
+#define T uint16_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X8);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c
index cfbcd9e57720c02295e1cf8a49b5a1f211c95cb3..28508d6d7c701b95db3c236051894686c125d9c9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint32_t, +, add, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_CASE_1(uint32_t, -, sub, VX_BINARY_BODY_X4)
-DEF_VX_BINARY_REVERSE_CASE_1(uint32_t, -, rsub, VX_BINARY_REVERSE_BODY_X4);
+#define T uint32_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X4);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c
index 5d837f1a6d476b2a552d57c1f65b3fbf35aea12e..fa50d0f3b134a115feb423192eeb5854f36635b1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint64_t, +, add, VX_BINARY_BODY)
-DEF_VX_BINARY_CASE_1(uint64_t, -, sub, VX_BINARY_BODY)
-DEF_VX_BINARY_REVERSE_CASE_1(uint64_t, -, rsub, VX_BINARY_REVERSE_BODY);
+#define T uint64_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY);
 
 /* { dg-final { scan-assembler-not {vadd.vx} } } */
 /* { dg-final { scan-assembler-not {vsub.vx} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c
index 0da03d6225be52fe03f17e9e72fe6b6f5b3a20e2..da51d0a1116b2d86d4aaf6b445da893f58db365f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c
@@ -3,9 +3,11 @@
 
 #include "vx_binary.h"
 
-DEF_VX_BINARY_CASE_1(uint8_t, +, add, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_CASE_1(uint8_t, -, sub, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_REVERSE_CASE_1(uint8_t, -, rsub, VX_BINARY_REVERSE_BODY_X16);
+#define T uint8_t
+
+DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16);
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */