]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
media: hantro: Add support for Hantro G1 on RK356x
authorPiotr Oniszczuk <piotr.oniszczuk@gmail.com>
Mon, 14 Feb 2022 21:29:53 +0000 (21:29 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 Aug 2022 12:41:01 +0000 (14:41 +0200)
[ Upstream commit 5f6bfab6da6531238e899fdf29efd6d0185adc3e ]

RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP8
video formats.

This patch adds support for RK356x family in existing Hantro
video decoder kernel driver.

Tested on [1] with FFmpeg v4l2_request code taken from [2]
with MPEG2, H.642 and VP8 samples with results [3].

[1] https://github.com/warpme/minimyth2
[2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch
[3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt

Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/staging/media/hantro/hantro_drv.c
drivers/staging/media/hantro/hantro_hw.h
drivers/staging/media/hantro/rockchip_vpu_hw.c

index bd7d11032c94ab6619c0a0c06bbfa372e2cbe10b..ac232b5f7825cc2474e68f5c33ca992ef8974178 100644 (file)
@@ -638,6 +638,7 @@ static const struct of_device_id of_hantro_match[] = {
        { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
        { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
        { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
+       { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
 #endif
 #ifdef CONFIG_VIDEO_HANTRO_IMX8M
        { .compatible = "nxp,imx8mm-vpu-g1", .data = &imx8mm_vpu_g1_variant, },
index ed018e293ba07d29b049ab3eef4de5efd5d0fb34..c5dc77125fb74606acd77ad8f97cde3ccaba5d74 100644 (file)
@@ -300,6 +300,7 @@ extern const struct hantro_variant rk3066_vpu_variant;
 extern const struct hantro_variant rk3288_vpu_variant;
 extern const struct hantro_variant rk3328_vpu_variant;
 extern const struct hantro_variant rk3399_vpu_variant;
+extern const struct hantro_variant rk3568_vpu_variant;
 extern const struct hantro_variant sama5d4_vdec_variant;
 extern const struct hantro_variant sunxi_vpu_variant;
 
index 163cf92eafca8cf4d655aca680f87f42f3b12235..fc96501f3bc87f3501710b5da06a074add64808e 100644 (file)
@@ -545,6 +545,20 @@ const struct hantro_variant rk3399_vpu_variant = {
        .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
 };
 
+const struct hantro_variant rk3568_vpu_variant = {
+       .dec_offset = 0x400,
+       .dec_fmts = rk3399_vpu_dec_fmts,
+       .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
+       .codec = HANTRO_MPEG2_DECODER |
+                HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
+       .codec_ops = rk3399_vpu_codec_ops,
+       .irqs = rockchip_vdpu2_irqs,
+       .num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs),
+       .init = rockchip_vpu_hw_init,
+       .clk_names = rockchip_vpu_clk_names,
+       .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
+};
+
 const struct hantro_variant px30_vpu_variant = {
        .enc_offset = 0x0,
        .enc_fmts = rockchip_vpu_enc_fmts,