drm/amd/display: Add Extra SMU Log for dtbclk

[why]
need to check dtbclk in log for confirmation

Reviewed-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
index bc11510b63a1a941cbf573adea082becf300d2f0..7134d8998efc2208dc76b4a50de63d8f65a700fd 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
@@ -474,6 +474,9 @@ static void dcn42_dump_clk_registers(struct clk_state_registers_and_bypass *regs
                DC_LOG_SMU("CLK1_CLK1_CURRENT_CNT,%d,dppclk\n",
                                        internal.CLK8_CLK1_CURRENT_CNT);
 
+               DC_LOG_SMU("CLK1_CLK4_CURRENT_CNT,%d,dtbclk\n",
+                                       internal.CLK8_CLK4_CURRENT_CNT);
+
                DC_LOG_SMU("CLK1_CLK3_BYPASS_CNTL,%d,dcfclk_bypass\n",
                                        internal.CLK8_CLK3_BYPASS_CNTL);