Fix powerpc32 ceil, rint etc. on sNaN input (bug 20160).

The powerpc32 versions of ceil, floor, round, trunc, rint, nearbyint
and their float versions return sNaN for sNaN input when they should
return qNaN.  This patch fixes them to add a NaN argument to itself to
quiet sNaNs before returning.  The powerpc64 versions, which have the
same bug, will be addressed separately.

Tested for powerpc32.

	[BZ #20160]
	* sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Add NaN
	argument to itself before returning the result.
	* sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S (__nearbyint):
	Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S (__nearbyintf):
	Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_rint.S (__rint): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_rintf.S (__rintf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.

diff --git a/ChangeLog b/ChangeLog
index 812f0a51abab2c45edf1947545eca5052b6e93e4..e652a0387cb10c492f1a3c698e626f48f97ff51e 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,22 @@
+2016-05-27  Joseph Myers  <joseph@codesourcery.com>
+
+       [BZ #20160]
+       * sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Add NaN
+       argument to itself before returning the result.
+       * sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S (__nearbyint):
+       Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S (__nearbyintf):
+       Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_rint.S (__rint): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_rintf.S (__rintf): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
+
 2016-05-27  Paul E. Murphy  <murphyp@linux.vnet.ibm.com>
 
        * libm-test.inc: Replace usage of M_El with

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S
index 07d031e22ee7f4f89144e73ec654f8ded5cb264f..161295962deae945fe6e51b41ba08afaf2127f4b 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S
@@ -44,7 +44,7 @@ ENTRY (__ceil)
        mffs    fp11            /* Save current FPU rounding mode and
                                   "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr-  cr7
+       bnl-    cr7,.L10
        mtfsfi  7,2             /* Set rounding mode toward +inf.  */
        ble-    cr6,.L4
        fadd    fp1,fp1,fp13    /* x+= TWO52;  */
@@ -64,6 +64,12 @@ ENTRY (__ceil)
        mtfsf   0xff,fp11       /* Restore previous rounding mode and
                                   "inexact" state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadd    fp1,fp1,fp1
+       blr
        END (__ceil)
 
 weak_alias (__ceil, ceil)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S
index 3987e24e41a5fb811b2b52efe0d80a66793ec439..63ffd5f8ecb881a0a95a070d4d20abef3c1f5b2e 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S
@@ -43,7 +43,7 @@ ENTRY (__ceilf)
        mffs    fp11            /* Save current FPU rounding mode and
                                   "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr-  cr7
+       bnl-    cr7,.L10
        mtfsfi  7,2             /* Set rounding mode toward +inf.  */
        ble-    cr6,.L4
        fadds   fp1,fp1,fp13    /* x+= TWO23;  */
@@ -63,6 +63,12 @@ ENTRY (__ceilf)
        mtfsf   0xff,fp11       /* Restore previous rounding mode and
                                   "inexact" state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadds   fp1,fp1,fp1
+       blr
        END (__ceilf)
 
 weak_alias (__ceilf, ceilf)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floor.S b/sysdeps/powerpc/powerpc32/fpu/s_floor.S
index b951666bd7cc126aa81560c3905aaf7b6fed1f4c..269e1dc80822af1e3366b2c72098c3fb3cd6b6bc 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_floor.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_floor.S
@@ -44,7 +44,7 @@ ENTRY (__floor)
        mffs    fp11            /* Save current FPU rounding mode and
                                   "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr-  cr7
+       bnl-    cr7,.L10
        mtfsfi  7,3             /* Set rounding mode toward -inf.  */
        ble-    cr6,.L4
        fadd    fp1,fp1,fp13    /* x+= TWO52;  */
@@ -64,6 +64,12 @@ ENTRY (__floor)
        mtfsf   0xff,fp11       /* Restore previous rounding mode and
                                   "inexact" state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadd    fp1,fp1,fp1
+       blr
        END (__floor)
 
 weak_alias (__floor, floor)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S
index 64b87b1cc14dffb34d329ee00af6264e5fc2a9d8..642d910561cc8157d661c9b992b41a32cdbf0e34 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S
@@ -43,7 +43,7 @@ ENTRY (__floorf)
        mffs    fp11            /* Save current FPU rounding mode and
                                   "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr-  cr7
+       bnl-    cr7,.L10
        mtfsfi  7,3             /* Set rounding mode toward -inf.  */
        ble-    cr6,.L4
        fadds   fp1,fp1,fp13    /* x+= TWO23;  */
@@ -63,6 +63,12 @@ ENTRY (__floorf)
        mtfsf   0xff,fp11       /* Restore previous rounding mode and
                                   "inexact" state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadds   fp1,fp1,fp1
+       blr
        END (__floorf)
 
 weak_alias (__floorf, floorf)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S b/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S
index 68e3182b0d5c3b8f49edf3ecbb7256c1fbe5863a..fee7e9e8b04ec37407c3e534e420014d9729d771 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S
@@ -49,7 +49,7 @@ ENTRY (__nearbyint)
        fabs    fp0,fp1
        fsub    fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO52 */
-       bgelr   cr7
+       bge     cr7,.L10
        fcmpu   cr7,fp1,fp12    /* if (x > 0.0 */
        ble     cr7,L(lessthanzero)
        mffs    fp11
@@ -68,6 +68,12 @@ L(lessthanzero):
        fnabs   fp1,fp1         /* if (x == 0.0) */
        mtfsf   0xff,fp11       /* Restore FE_INEXACT state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadd    fp1,fp1,fp1
+       blr
 END (__nearbyint)
 
 weak_alias (__nearbyint, nearbyint)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S b/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S
index 107b035a24880111b0d06a72dd7704e9fdf0520b..7490e9c6d3d0b8e4ddc09da152096b1fbb94dc4d 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S
@@ -48,7 +48,7 @@ ENTRY (__nearbyintf)
        fabs    fp0,fp1
        fsub    fp12,fp13,fp13          /* generate 0.0  */
        fcmpu   cr7,fp0,fp13            /* if (fabs(x) > TWO23 */
-       bgelr   cr7
+       bge     cr7,.L10
        fcmpu   cr7,fp1,fp12            /* if (x > 0.0 */
        ble     cr7,L(lessthanzero)
        mffs    fp11
@@ -67,6 +67,12 @@ L(lessthanzero):
        fnabs   fp1,fp1                 /* if (x == 0.0) */
        mtfsf   0xff,fp11               /* Restore FE_INEXACT state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadds   fp1,fp1,fp1
+       blr
 END (__nearbyintf)
 
 weak_alias (__nearbyintf, nearbyintf)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_rint.S b/sysdeps/powerpc/powerpc32/fpu/s_rint.S
index 5d78f3a5fcf1b685e62347e5fbcdf049a563254c..8124feec8d443a7241206073ca30860a7ea59d91 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_rint.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_rint.S
@@ -45,7 +45,7 @@ ENTRY (__rint)
        fsub    fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO52)  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr   cr7
+       bnl     cr7,.L10
        bng     cr6,.L4
        fadd    fp1,fp1,fp13    /* x+= TWO52;  */
        fsub    fp1,fp1,fp13    /* x-= TWO52;  */
@@ -57,6 +57,12 @@ ENTRY (__rint)
        fadd    fp1,fp1,fp13    /* x+= TWO52;  */
        fnabs   fp1,fp1         /* if (x == 0.0)  */
        blr                     /* x = -0.0; */
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadd    fp1,fp1,fp1
+       blr
        END (__rint)
 
 weak_alias (__rint, rint)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_rintf.S b/sysdeps/powerpc/powerpc32/fpu/s_rintf.S
index 94b7045da6b7ea7c114593c48771cf66df8a81c3..1fd4c2ab0f21235d776e1ca5f12908d629d87649 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_rintf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_rintf.S
@@ -41,7 +41,7 @@ ENTRY (__rintf)
        fsubs   fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO23)  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr   cr7
+       bnl     cr7,.L10
        bng     cr6,.L4
        fadds   fp1,fp1,fp13    /* x+= TWO23;  */
        fsubs   fp1,fp1,fp13    /* x-= TWO23;  */
@@ -53,6 +53,12 @@ ENTRY (__rintf)
        fadds   fp1,fp1,fp13    /* x+= TWO23;  */
        fnabs   fp1,fp1         /* if (x == 0.0)  */
        blr                     /* x = -0.0; */
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadds   fp1,fp1,fp1
+       blr
        END (__rintf)
 
 weak_alias (__rintf, rintf)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_round.S b/sysdeps/powerpc/powerpc32/fpu/s_round.S
index ae25364bd90e9c677be077efe87e7426a805a662..c224e0c2e3ae0df34cafc3048a133e797bf06f89 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_round.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_round.S
@@ -57,7 +57,7 @@ ENTRY (__round)
        mffs    fp11            /* Save current FPU rounding mode and
                                   "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr-  cr7
+       bnl-    cr7,.L10
        mtfsfi  7,1             /* Set rounding mode toward 0.  */
 #ifdef SHARED
        lfs     fp10,.LC1-.LC0(r9)
@@ -85,6 +85,12 @@ ENTRY (__round)
        mtfsf   0xff,fp11       /* Restore previous rounding mode and
                                   "inexact" state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadd    fp1,fp1,fp1
+       blr
        END (__round)
 
 weak_alias (__round, round)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_roundf.S b/sysdeps/powerpc/powerpc32/fpu/s_roundf.S
index f63248138ffe0e3c4779ae5a4d6482d6ddd93833..d1341c714959a33ffc03c1de156a65b387762366 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_roundf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_roundf.S
@@ -56,7 +56,7 @@ ENTRY (__roundf )
        mffs    fp11            /* Save current FPU rounding mode and
                                   "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr-  cr7
+       bnl-    cr7,.L10
        mtfsfi  7,1             /* Set rounding mode toward 0.  */
 #ifdef SHARED
        lfs     fp10,.LC1-.LC0(r9)
@@ -83,6 +83,12 @@ ENTRY (__roundf )
        mtfsf   0xff,fp11       /* Restore previous rounding mode and
                                   "inexact" state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadds   fp1,fp1,fp1
+       blr
        END (__roundf)
 
 weak_alias (__roundf, roundf)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S
index 260b4fd336c16801c4299d9ea459adafb98cffe7..a4e9a2d9d620102f1ea6a740efc0ce84ce78ab7f 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S
@@ -51,7 +51,7 @@ ENTRY (__trunc)
        mffs    fp11            /* Save current FPU rounding mode and
                                   "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr-  cr7
+       bnl-    cr7,.L10
        mtfsfi  7,1             /* Set rounding toward 0 mode.  */
        ble-    cr6,.L4
        fadd    fp1,fp1,fp13    /* x+= TWO52;  */
@@ -71,6 +71,12 @@ ENTRY (__trunc)
        mtfsf   0xff,fp11       /* Restore previous rounding mode and
                                   "inexact" state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadd    fp1,fp1,fp1
+       blr
        END (__trunc)
 
 weak_alias (__trunc, trunc)

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S
index 6c2c959e711f6b95719c1f3dd3e5a858cb0eff32..6006f1553bf82a21079431d6b578b0caad544b76 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S
@@ -50,7 +50,7 @@ ENTRY (__truncf)
        mffs    fp11            /* Save current FPU rounding mode and
                                   "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr-  cr7
+       bnl-    cr7,.L10
        mtfsfi  7,1             /* Set rounding toward 0 mode.  */
        ble-    cr6,.L4
        fadds   fp1,fp1,fp13    /* x+= TWO23;  */
@@ -70,6 +70,12 @@ ENTRY (__truncf)
        mtfsf   0xff,fp11       /* Restore previous rounding mode and
                                   "inexact" state.  */
        blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadds   fp1,fp1,fp1
+       blr
        END (__truncf)
 
 weak_alias (__truncf, truncf)