]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
wifi: ath12k: Add a table of parameters entries impacting memory consumption
authorAaradhana Sahu <aaradhana.sahu@oss.qualcomm.com>
Tue, 8 Jul 2025 18:10:59 +0000 (23:40 +0530)
committerJeff Johnson <jeff.johnson@oss.qualcomm.com>
Mon, 14 Jul 2025 14:32:15 +0000 (07:32 -0700)
Introduce ath12k_mem_profile_based_param structure to define
configuration parameters for both default and low-memory profiles.

Add support for enabling the low-memory profile in the follow-up
patch by making the following changes:
- Reduce sizes for transmit, receive, and monitor descriptor rings.
- Reduce transmit and receive descriptor count.
- Limit the maximum number of virtual devices (vdevs) to 9.
- Reduce the maximum number of client support per radio.

Centralize these parameters in the ath12k_mem_profile_based_param
structure to simplify switching between memory profiles.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.5-01651-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 WLAN.HMT.1.1.c5-00284.1-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3

Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com>
Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com>
Link: https://patch.msgid.link/20250708181102.4111054-2-aaradhana.sahu@oss.qualcomm.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
drivers/net/wireless/ath/ath12k/core.c
drivers/net/wireless/ath/ath12k/core.h
drivers/net/wireless/ath/ath12k/qmi.c
drivers/net/wireless/ath/ath12k/qmi.h

index ffc19a6b948539dddf3f6f21f2799f1b661347f7..8b0c6773517155564c88078d622a42de8ed92b62 100644 (file)
@@ -37,6 +37,36 @@ static struct list_head ath12k_hw_group_list = LIST_HEAD_INIT(ath12k_hw_group_li
 
 static DEFINE_MUTEX(ath12k_hw_group_mutex);
 
+static const struct
+ath12k_mem_profile_based_param ath12k_mem_profile_based_param[] = {
+[ATH12K_QMI_MEMORY_MODE_DEFAULT] = {
+               .num_vdevs = 17,
+               .max_client_single = 512,
+               .max_client_dbs = 128,
+               .max_client_dbs_sbs = 128,
+               .dp_params = {
+                       .tx_comp_ring_size = 32768,
+                       .rxdma_monitor_buf_ring_size = 4096,
+                       .rxdma_monitor_dst_ring_size = 8092,
+                       .num_pool_tx_desc = 32768,
+                       .rx_desc_count = 12288,
+               },
+       },
+[ATH12K_QMI_MEMORY_MODE_LOW_512_M] = {
+               .num_vdevs = 9,
+               .max_client_single = 128,
+               .max_client_dbs = 64,
+               .max_client_dbs_sbs = 64,
+               .dp_params = {
+                       .tx_comp_ring_size = 16384,
+                       .rxdma_monitor_buf_ring_size = 256,
+                       .rxdma_monitor_dst_ring_size = 512,
+                       .num_pool_tx_desc = 16384,
+                       .rx_desc_count = 6144,
+               },
+       },
+};
+
 static int ath12k_core_rfkill_config(struct ath12k_base *ab)
 {
        struct ath12k *ar;
@@ -1713,6 +1743,7 @@ static void ath12k_core_reset(struct work_struct *work)
 
 int ath12k_core_pre_init(struct ath12k_base *ab)
 {
+       const struct ath12k_mem_profile_based_param *param;
        int ret;
 
        ret = ath12k_hw_init(ab);
@@ -1721,6 +1752,8 @@ int ath12k_core_pre_init(struct ath12k_base *ab)
                return ret;
        }
 
+       param = &ath12k_mem_profile_based_param[ATH12K_QMI_MEMORY_MODE_DEFAULT];
+       ab->profile_param = param;
        ath12k_fw_map(ab);
 
        return 0;
index 042d6bcd1c6ea84f3bb74328266514b10a41a7d2..b062bbb1737d089d168909d476c4b71215cbeb8d 100644 (file)
@@ -1011,6 +1011,22 @@ struct ath12k_wsi_info {
        u32 hw_link_id_base;
 };
 
+struct ath12k_dp_profile_params {
+       u32 tx_comp_ring_size;
+       u32 rxdma_monitor_buf_ring_size;
+       u32 rxdma_monitor_dst_ring_size;
+       u32 num_pool_tx_desc;
+       u32 rx_desc_count;
+};
+
+struct ath12k_mem_profile_based_param {
+       u32 num_vdevs;
+       u32 max_client_single;
+       u32 max_client_dbs;
+       u32 max_client_dbs_sbs;
+       struct ath12k_dp_profile_params dp_params;
+};
+
 /* Master structure to hold the hw data which may be used in core module */
 struct ath12k_base {
        enum ath12k_hw_rev hw_rev;
@@ -1214,6 +1230,7 @@ struct ath12k_base {
        struct ath12k_reg_freq reg_freq_2ghz;
        struct ath12k_reg_freq reg_freq_5ghz;
        struct ath12k_reg_freq reg_freq_6ghz;
+       const struct ath12k_mem_profile_based_param *profile_param;
 
        /* must be last */
        u8 drv_priv[] __aligned(sizeof(void *));
index 99e1fb2910d06b2e140733355011725175b542b4..5e8943060443d376d07305d48cfd2254b3636067 100644 (file)
@@ -3856,7 +3856,7 @@ int ath12k_qmi_init_service(struct ath12k_base *ab)
        memset(&ab->qmi.target_mem, 0, sizeof(struct target_mem_chunk));
        ab->qmi.ab = ab;
 
-       ab->qmi.target_mem_mode = ATH12K_QMI_TARGET_MEM_MODE_DEFAULT;
+       ab->qmi.target_mem_mode = ATH12K_QMI_MEMORY_MODE_DEFAULT;
        ret = qmi_handle_init(&ab->qmi.handle, ATH12K_QMI_RESP_LEN_MAX,
                              &ath12k_qmi_ops, ath12k_qmi_msg_handlers);
        if (ret < 0) {
index 96e6c3daecfea48efc8fb65ccfddcd516ef2f3ce..abdaade3b542a9e5e8695ac09f31d0f40a8a8b42 100644 (file)
@@ -37,7 +37,6 @@
 
 #define QMI_WLANFW_MAX_DATA_SIZE_V01           6144
 #define ATH12K_FIRMWARE_MODE_OFF               4
-#define ATH12K_QMI_TARGET_MEM_MODE_DEFAULT     0
 
 #define ATH12K_BOARD_ID_DEFAULT        0xFF
 
@@ -602,6 +601,11 @@ struct qmi_wlanfw_wlan_ini_resp_msg_v01 {
        struct qmi_response_type_v01 resp;
 };
 
+enum ath12k_qmi_mem_mode {
+       ATH12K_QMI_MEMORY_MODE_DEFAULT = 0,
+       ATH12K_QMI_MEMORY_MODE_LOW_512_M,
+};
+
 static inline void ath12k_qmi_set_event_block(struct ath12k_qmi *qmi, bool block)
 {
        lockdep_assert_held(&qmi->event_lock);