{
struct device *ddev = disk_to_dev(disk);
-@@ -451,6 +453,8 @@ int __must_check device_add_disk(struct
+@@ -452,6 +454,8 @@ int __must_check device_add_disk(struct
ddev->parent = parent;
ddev->groups = groups;
dev_set_name(ddev, "%s", disk->disk_name);
if (!(disk->flags & GENHD_FL_HIDDEN))
ddev->devt = MKDEV(disk->major, disk->first_minor);
ret = device_add(ddev);
-@@ -552,6 +556,22 @@ out_exit_elevator:
+@@ -553,6 +557,22 @@ out_exit_elevator:
elevator_exit(disk->queue);
return ret;
}
static void blk_report_disk_dead(struct gendisk *disk, bool surprise)
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
-@@ -741,6 +741,9 @@ static inline unsigned int blk_queue_dep
+@@ -734,6 +734,9 @@ static inline unsigned int blk_queue_dep
#define for_each_bio(_bio) \
for (; _bio; _bio = _bio->bi_next)
--- a/drivers/mmc/core/block.c
+++ b/drivers/mmc/core/block.c
-@@ -2455,6 +2455,56 @@ static inline int mmc_blk_readonly(struc
+@@ -2517,6 +2517,56 @@ static inline int mmc_blk_readonly(struc
!(card->csd.cmdclass & CCC_BLOCK_WRITE);
}
static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card,
struct device *parent,
sector_t size,
-@@ -2463,6 +2513,7 @@ static struct mmc_blk_data *mmc_blk_allo
+@@ -2525,6 +2575,7 @@ static struct mmc_blk_data *mmc_blk_allo
int area_type,
unsigned int part_type)
{
struct mmc_blk_data *md;
int devidx, ret;
char cap_str[10];
-@@ -2568,7 +2619,9 @@ static struct mmc_blk_data *mmc_blk_allo
+@@ -2626,7 +2677,9 @@ static struct mmc_blk_data *mmc_blk_allo
/* used in ->open, must be set before add_disk: */
if (area_type == MMC_BLK_DATA_AREA_MAIN)
dev_set_drvdata(&card->dev, md);
obj-y += spi/
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
-@@ -870,6 +870,15 @@ config SPI_QCOM_QSPI
+@@ -898,6 +898,15 @@ config SPI_QCOM_QSPI
help
QSPI(Quad SPI) driver for Qualcomm QSPI controller.
depends on ARCH_QCOM || COMPILE_TEST
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
-@@ -110,6 +110,7 @@ obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-
+@@ -114,6 +114,7 @@ obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-
obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o
obj-$(CONFIG_SPI_QCOM_GENI) += spi-geni-qcom.o
obj-$(CONFIG_SPI_QCOM_QSPI) += spi-qcom-qspi.o
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
-@@ -871,9 +871,9 @@ config SPI_QCOM_QSPI
+@@ -899,9 +899,9 @@ config SPI_QCOM_QSPI
QSPI(Quad SPI) driver for Qualcomm QSPI controller.
config SPI_QPIC_SNAND
mcr |= MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK;
mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
}
-@@ -4476,6 +4486,61 @@ static int mtk_set_pauseparam(struct net
+@@ -4485,6 +4495,61 @@ static int mtk_set_pauseparam(struct net
return phylink_ethtool_set_pauseparam(mac->phylink, pause);
}
static u16 mtk_select_queue(struct net_device *dev, struct sk_buff *skb,
struct net_device *sb_dev)
{
-@@ -4508,6 +4573,8 @@ static const struct ethtool_ops mtk_etht
+@@ -4517,6 +4582,8 @@ static const struct ethtool_ops mtk_etht
.set_pauseparam = mtk_set_pauseparam,
.get_rxnfc = mtk_get_rxnfc,
.set_rxnfc = mtk_set_rxnfc,
};
static const struct net_device_ops mtk_netdev_ops = {
-@@ -4568,6 +4635,8 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4577,6 +4644,8 @@ static int mtk_add_mac(struct mtk_eth *e
}
mac = netdev_priv(eth->netdev[id]);
eth->mac[id] = mac;
/* Mac status registers */
#define MTK_MAC_MSR(x) (0x10108 + (x * 0x100))
#define MAC_MSR_EEE1G BIT(7)
-@@ -1321,6 +1332,8 @@ struct mtk_mac {
+@@ -1308,6 +1319,8 @@ struct mtk_mac {
int id;
phy_interface_t interface;
u8 ppe_idx;
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4778,11 +4778,7 @@ static void r8169_phylink_handler(struct
+@@ -4777,11 +4777,7 @@ static void r8169_phylink_handler(struct
if (netif_carrier_ok(ndev)) {
rtl_link_chg_patch(tp);
pm_request_resume(d);
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5491,11 +5491,6 @@ static int rtl_init_one(struct pci_dev *
+@@ -5489,11 +5489,6 @@ static int rtl_init_one(struct pci_dev *
dev->features |= dev->hw_features;
if (rtl_chip_supports_csum_v2(tp)) {
dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6;
netif_set_tso_max_size(dev, RTL_GSO_MAX_SIZE_V2);
-@@ -5506,6 +5501,17 @@ static int rtl_init_one(struct pci_dev *
+@@ -5504,6 +5499,17 @@ static int rtl_init_one(struct pci_dev *
netif_set_tso_max_segs(dev, RTL_GSO_MAX_SEGS_V1);
}
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2161,6 +2161,19 @@ static void rtl8169_get_ringparam(struct
+@@ -2160,6 +2160,19 @@ static void rtl8169_get_ringparam(struct
data->tx_pending = NUM_TX_DESC;
}
static void rtl8169_get_pauseparam(struct net_device *dev,
struct ethtool_pauseparam *data)
{
-@@ -2187,6 +2200,69 @@ static int rtl8169_set_pauseparam(struct
+@@ -2186,6 +2199,69 @@ static int rtl8169_set_pauseparam(struct
return 0;
}
static const struct ethtool_ops rtl8169_ethtool_ops = {
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
ETHTOOL_COALESCE_MAX_FRAMES,
-@@ -2208,8 +2284,11 @@ static const struct ethtool_ops rtl8169_
+@@ -2207,8 +2283,11 @@ static const struct ethtool_ops rtl8169_
.get_link_ksettings = phy_ethtool_get_link_ksettings,
.set_link_ksettings = phy_ethtool_set_link_ksettings,
.get_ringparam = rtl8169_get_ringparam,
};
static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
-@@ -3894,6 +3973,9 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3893,6 +3972,9 @@ static void rtl_hw_start_8125(struct rtl
break;
}
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4801,10 +4801,8 @@ static void rtl_task(struct work_struct
+@@ -4800,10 +4800,8 @@ static void rtl_task(struct work_struct
container_of(work, struct rtl8169_private, wk.work);
int ret;
if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
/* if chip isn't accessible, reset bus to revive it */
-@@ -4813,7 +4811,7 @@ static void rtl_task(struct work_struct
+@@ -4812,7 +4810,7 @@ static void rtl_task(struct work_struct
if (ret < 0) {
netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
netif_device_detach(tp->dev);
}
}
-@@ -4832,8 +4830,6 @@ reset:
+@@ -4831,8 +4829,6 @@ reset:
} else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
rtl_reset_work(tp);
}
tp->tx_lpi_timer = timer_val;
RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
break;
-@@ -2294,6 +2294,9 @@ static enum mac_version rtl8169_get_mac_
+@@ -2293,6 +2293,9 @@ static enum mac_version rtl8169_get_mac_
{ 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
/* 8125B family. */
{ 0x7cf, 0x641, RTL_GIGA_MAC_VER_63 },
-@@ -2561,9 +2564,7 @@ static void rtl_init_rxcfg(struct rtl816
+@@ -2560,9 +2563,7 @@ static void rtl_init_rxcfg(struct rtl816
case RTL_GIGA_MAC_VER_61:
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
break;
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
RX_PAUSE_SLOT_ON);
break;
-@@ -3875,6 +3876,12 @@ static void rtl_hw_start_8125b(struct rt
+@@ -3874,6 +3875,12 @@ static void rtl_hw_start_8125b(struct rt
rtl_hw_start_8125_common(tp);
}
static void rtl_hw_start_8126a(struct rtl8169_private *tp)
{
rtl_set_def_aspm_entry_latency(tp);
-@@ -3923,6 +3930,7 @@ static void rtl_hw_config(struct rtl8169
+@@ -3922,6 +3929,7 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117,
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
};
-@@ -3940,6 +3948,7 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3939,6 +3947,7 @@ static void rtl_hw_start_8125(struct rtl
/* disable interrupt coalescing */
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_61:
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2226,7 +2226,7 @@ static void rtl8169_get_eth_mac_stats(st
+@@ -2225,7 +2225,7 @@ static void rtl8169_get_eth_mac_stats(st
le64_to_cpu(tp->counters->tx_broadcast64);
mac_stats->MulticastFramesReceivedOK =
le64_to_cpu(tp->counters->rx_multicast64);
EEE_TXIDLE_TIMER_8125 = 0x6048,
};
-@@ -3769,8 +3771,8 @@ static void rtl_hw_start_8125_common(str
+@@ -3768,8 +3770,8 @@ static void rtl_hw_start_8125_common(str
rtl_pcie_state_l2l3_disable(tp);
RTL_W16(tp, 0x382, 0x221b);
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
-@@ -5460,8 +5437,6 @@ static int rtl_init_one(struct pci_dev *
+@@ -5458,8 +5435,6 @@ static int rtl_init_one(struct pci_dev *
tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
tp->ocp_base = OCP_STD_PHY_BASE;
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2546,86 +2546,31 @@ static void rtl8169_init_ring_indexes(st
+@@ -2545,86 +2545,31 @@ static void rtl8169_init_ring_indexes(st
tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0;
}
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5236,6 +5236,11 @@ static int r8169_mdio_register(struct rt
- tp->phydev->supported_eee);
+@@ -5234,6 +5234,11 @@ static int r8169_mdio_register(struct rt
+ phy_support_eee(tp->phydev);
phy_support_asym_pause(tp->phydev);
+ /* mimic behavior of r8125/r8126 vendor drivers */
RTL_FLAG_TASK_TX_TIMEOUT,
RTL_FLAG_MAX
};
-@@ -4729,8 +4728,6 @@ static void rtl_task(struct work_struct
+@@ -4728,8 +4727,6 @@ static void rtl_task(struct work_struct
reset:
rtl_reset_work(tp);
netif_wake_queue(tp->dev);
[RTL_GIGA_MAC_VER_14] = {"RTL8401" },
[RTL_GIGA_MAC_VER_17] = {"RTL8168b/8111b" },
[RTL_GIGA_MAC_VER_18] = {"RTL8168cp/8111cp" },
-@@ -2336,7 +2335,7 @@ static enum mac_version rtl8169_get_mac_
+@@ -2335,7 +2334,7 @@ static enum mac_version rtl8169_get_mac_
/* 8168B family. */
{ 0x7c8, 0x380, RTL_GIGA_MAC_VER_17 },
* { 0x7c8, 0x300, RTL_GIGA_MAC_VER_11 },
*/
-@@ -3806,7 +3805,6 @@ static void rtl_hw_config(struct rtl8169
+@@ -3805,7 +3804,6 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_08] = rtl_hw_start_8102e_3,
[RTL_GIGA_MAC_VER_09] = rtl_hw_start_8102e_2,
[RTL_GIGA_MAC_VER_10] = NULL,
[RTL_GIGA_MAC_VER_14] = rtl_hw_start_8401,
[RTL_GIGA_MAC_VER_17] = rtl_hw_start_8168b,
[RTL_GIGA_MAC_VER_18] = rtl_hw_start_8168cp_1,
-@@ -4682,12 +4680,6 @@ static irqreturn_t rtl8169_interrupt(int
+@@ -4681,12 +4679,6 @@ static irqreturn_t rtl8169_interrupt(int
if (status & LinkChg)
phy_mac_interrupt(tp->phydev);
rtl_irq_disable(tp);
napi_schedule(&tp->napi);
out:
-@@ -5107,9 +5099,6 @@ static void rtl_set_irq_mask(struct rtl8
+@@ -5106,9 +5098,6 @@ static void rtl_set_irq_mask(struct rtl8
if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
tp->irq_mask |= SYSErr | RxFIFOOver;
}
static int rtl_alloc_irq(struct rtl8169_private *tp)
-@@ -5304,7 +5293,6 @@ static int rtl_jumbo_max(struct rtl8169_
+@@ -5302,7 +5291,6 @@ static int rtl_jumbo_max(struct rtl8169_
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
return JUMBO_7K;
/* RTL8168b */
tp->tx_lpi_timer = timer_val;
RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
break;
-@@ -2256,8 +2256,8 @@ static enum mac_version rtl8169_get_mac_
+@@ -2255,8 +2255,8 @@ static enum mac_version rtl8169_get_mac_
enum mac_version ver;
} mac_info[] = {
/* 8126A family. */
/* 8125D family. */
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
-@@ -2529,7 +2529,7 @@ static void rtl_init_rxcfg(struct rtl816
+@@ -2528,7 +2528,7 @@ static void rtl_init_rxcfg(struct rtl816
case RTL_GIGA_MAC_VER_61:
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
break;
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
RX_PAUSE_SLOT_ON);
break;
-@@ -2661,7 +2661,7 @@ static void rtl_wait_txrx_fifo_empty(str
+@@ -2660,7 +2660,7 @@ static void rtl_wait_txrx_fifo_empty(str
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
break;
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
-@@ -2904,7 +2904,7 @@ static void rtl_enable_exit_l1(struct rt
+@@ -2903,7 +2903,7 @@ static void rtl_enable_exit_l1(struct rt
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
rtl_eri_set_bits(tp, 0xd4, 0x0c00);
break;
r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
break;
default:
-@@ -2918,7 +2918,7 @@ static void rtl_disable_exit_l1(struct r
+@@ -2917,7 +2917,7 @@ static void rtl_disable_exit_l1(struct r
case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
break;
r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
break;
default:
-@@ -2944,8 +2944,8 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2943,8 +2943,8 @@ static void rtl_hw_aspm_clkreq_enable(st
rtl_mod_config5(tp, 0, ASPM_en);
switch (tp->mac_version) {
val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
-@@ -2956,7 +2956,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2955,7 +2955,7 @@ static void rtl_hw_aspm_clkreq_enable(st
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
/* reset ephy tx/rx disable timer */
r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
/* chip can trigger L1.2 */
-@@ -2968,7 +2968,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2967,7 +2967,7 @@ static void rtl_hw_aspm_clkreq_enable(st
} else {
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
break;
default:
-@@ -2976,8 +2976,8 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2975,8 +2975,8 @@ static void rtl_hw_aspm_clkreq_enable(st
}
switch (tp->mac_version) {
val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
-@@ -3697,12 +3697,12 @@ static void rtl_hw_start_8125_common(str
+@@ -3696,12 +3696,12 @@ static void rtl_hw_start_8125_common(str
/* disable new tx descriptor format */
r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
-@@ -3720,8 +3720,8 @@ static void rtl_hw_start_8125_common(str
+@@ -3719,8 +3719,8 @@ static void rtl_hw_start_8125_common(str
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
else
r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
-@@ -3840,8 +3840,8 @@ static void rtl_hw_config(struct rtl8169
+@@ -3839,8 +3839,8 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
};
if (hw_configs[tp->mac_version])
-@@ -3862,8 +3862,8 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3861,8 +3861,8 @@ static void rtl_hw_start_8125(struct rtl
RTL_W32(tp, i, 0);
break;
case RTL_GIGA_MAC_VER_63:
for (i = 0xa00; i < 0xa80; i += 4)
RTL_W32(tp, i, 0);
RTL_W16(tp, INT_CFG1_8125, 0x0000);
-@@ -4095,7 +4095,7 @@ static void rtl8169_cleanup(struct rtl81
+@@ -4094,7 +4094,7 @@ static void rtl8169_cleanup(struct rtl81
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
break;
rtl_enable_rxdvgate(tp);
fsleep(2000);
break;
-@@ -4252,7 +4252,7 @@ static unsigned int rtl_quirk_packet_pad
+@@ -4251,7 +4251,7 @@ static unsigned int rtl_quirk_packet_pad
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_34:
padto = max_t(unsigned int, padto, ETH_ZLEN);
break;
default:
-@@ -5274,7 +5274,7 @@ static void rtl_hw_initialize(struct rtl
+@@ -5272,7 +5272,7 @@ static void rtl_hw_initialize(struct rtl
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
rtl_hw_init_8168g(tp);
break;
MODULE_FIRMWARE(FIRMWARE_8126A_2);
MODULE_FIRMWARE(FIRMWARE_8126A_3);
-@@ -2260,6 +2263,7 @@ static enum mac_version rtl8169_get_mac_
+@@ -2259,6 +2262,7 @@ static enum mac_version rtl8169_get_mac_
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
/* 8125D family. */
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
/* 8125B family. */
-@@ -3840,6 +3844,7 @@ static void rtl_hw_config(struct rtl8169
+@@ -3839,6 +3843,7 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
};
-@@ -3858,6 +3863,7 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3857,6 +3862,7 @@ static void rtl_hw_start_8125(struct rtl
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_61:
case RTL_GIGA_MAC_VER_64:
default:
return RTL_DASH_NONE;
}
-@@ -2262,6 +2287,9 @@ static enum mac_version rtl8169_get_mac_
+@@ -2261,6 +2286,9 @@ static enum mac_version rtl8169_get_mac_
{ 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
/* 8125D family. */
{ 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
-@@ -3845,6 +3873,7 @@ static void rtl_hw_config(struct rtl8169
+@@ -3844,6 +3872,7 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
};
-@@ -3864,6 +3893,7 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3863,6 +3892,7 @@ static void rtl_hw_start_8125(struct rtl
case RTL_GIGA_MAC_VER_61:
case RTL_GIGA_MAC_VER_64:
case RTL_GIGA_MAC_VER_65:
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5230,6 +5230,7 @@ static int r8169_mdio_register(struct rt
+@@ -5229,6 +5229,7 @@ static int r8169_mdio_register(struct rt
new_bus->priv = tp;
new_bus->parent = &pdev->dev;
new_bus->irq[0] = PHY_MAC_INTERRUPT;
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5208,6 +5208,33 @@ static int r8169_mdio_write_reg(struct m
+@@ -5207,6 +5207,33 @@ static int r8169_mdio_write_reg(struct m
return 0;
}
static int r8169_mdio_register(struct rtl8169_private *tp)
{
struct pci_dev *pdev = tp->pci_dev;
-@@ -5238,6 +5265,11 @@ static int r8169_mdio_register(struct rt
+@@ -5237,6 +5264,11 @@ static int r8169_mdio_register(struct rt
new_bus->read = r8169_mdio_read_reg;
new_bus->write = r8169_mdio_write_reg;
static const struct {
const char *name;
-@@ -5368,6 +5369,9 @@ static int rtl_jumbo_max(struct rtl8169_
+@@ -5366,6 +5367,9 @@ static int rtl_jumbo_max(struct rtl8169_
/* RTL8168c */
case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:
return JUMBO_6K;
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5406,7 +5406,7 @@ done:
+@@ -5404,7 +5404,7 @@ done:
/* register is set if system vendor successfully tested ASPM 1.2 */
static bool rtl_aspm_is_safe(struct rtl8169_private *tp)
{
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2856,6 +2856,32 @@ static u32 rtl_csi_read(struct rtl8169_p
+@@ -2855,6 +2855,32 @@ static u32 rtl_csi_read(struct rtl8169_p
RTL_R32(tp, CSIDR) : ~0;
}
static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)
{
struct pci_dev *pdev = tp->pci_dev;
-@@ -3828,6 +3854,7 @@ static void rtl_hw_start_8125d(struct rt
+@@ -3827,6 +3853,7 @@ static void rtl_hw_start_8125d(struct rt
static void rtl_hw_start_8126a(struct rtl8169_private *tp)
{
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
-@@ -325,10 +325,7 @@ config QSEMI_PHY
+@@ -358,10 +358,7 @@ config QSEMI_PHY
help
Currently supports the qs6612
tristate "Renesas PHYs"
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
-@@ -83,7 +83,7 @@ obj-$(CONFIG_NXP_CBTX_PHY) += nxp-cbtx.o
+@@ -95,7 +95,7 @@ obj-$(CONFIG_NXP_CBTX_PHY) += nxp-cbtx.o
obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o
obj-y += qcom/
obj-$(CONFIG_QSEMI_PHY) += qsemi.o
--- a/drivers/net/ethernet/intel/igc/igc_main.c
+++ b/drivers/net/ethernet/intel/igc/igc_main.c
-@@ -6850,6 +6850,9 @@ static int igc_probe(struct pci_dev *pde
+@@ -7066,6 +7066,9 @@ static int igc_probe(struct pci_dev *pde
netdev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |
NETDEV_XDP_ACT_XSK_ZEROCOPY;
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
-@@ -512,7 +512,7 @@ static int aqr107_config_mdi(struct phy_
+@@ -500,7 +500,7 @@ static int aqr107_config_mdi(struct phy_
ret = of_property_read_u32(np, "marvell,mdi-cfg-order", &mdi_conf);
/* Do nothing in case property "marvell,mdi-cfg-order" is not present */
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
-@@ -3220,11 +3220,17 @@ static int of_phy_led(struct phy_device
+@@ -3385,11 +3385,17 @@ static int of_phy_led(struct phy_device
if (index > U8_MAX)
return -EINVAL;
if (!phydev->drv->led_polarity_set)
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
-@@ -872,8 +872,9 @@ struct phy_led {
+@@ -877,8 +877,9 @@ struct phy_plca_status {
/* Modes for PHY LED configuration */
enum phy_led_modes {
--- a/drivers/net/phy/aquantia/aquantia.h
+++ b/drivers/net/phy/aquantia/aquantia.h
-@@ -169,6 +169,7 @@ static const struct aqr107_hw_stat aqr10
+@@ -177,6 +177,7 @@ static const struct aqr107_hw_stat aqr10
struct aqr107_priv {
u64 sgmii_stats[AQR107_SGMII_STAT_SZ];
unsigned long leds_active_low;
}
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
-@@ -529,7 +529,7 @@ static int aqr107_config_mdi(struct phy_
+@@ -517,7 +517,7 @@ static int aqr107_config_mdi(struct phy_
static int aqr107_config_init(struct phy_device *phydev)
{
struct aqr107_priv *priv = phydev->priv;
int ret;
/* Check that the PHY interface type is compatible */
-@@ -569,8 +569,14 @@ static int aqr107_config_init(struct phy
+@@ -548,8 +548,14 @@ static int aqr107_config_init(struct phy
return ret;
/* Restore LED polarity state after reset */
/* SGMII */
#define VSPEC1_SGMII_CTRL 0x08
#define VSPEC1_SGMII_CTRL_ANEN BIT(12) /* Aneg enable */
-@@ -827,6 +850,156 @@ static int gpy115_loopback(struct phy_de
+@@ -835,6 +858,156 @@ static int gpy115_loopback(struct phy_de
return genphy_soft_reset(phydev);
}
static struct phy_driver gpy_drivers[] = {
{
PHY_ID_MATCH_MODEL(PHY_ID_GPY2xx),
-@@ -844,6 +1017,11 @@ static struct phy_driver gpy_drivers[] =
+@@ -852,6 +1025,11 @@ static struct phy_driver gpy_drivers[] =
.set_wol = gpy_set_wol,
.get_wol = gpy_get_wol,
.set_loopback = gpy_loopback,
},
{
.phy_id = PHY_ID_GPY115B,
-@@ -862,6 +1040,11 @@ static struct phy_driver gpy_drivers[] =
+@@ -870,6 +1048,11 @@ static struct phy_driver gpy_drivers[] =
.set_wol = gpy_set_wol,
.get_wol = gpy_get_wol,
.set_loopback = gpy115_loopback,
},
{
PHY_ID_MATCH_MODEL(PHY_ID_GPY115C),
-@@ -879,6 +1062,11 @@ static struct phy_driver gpy_drivers[] =
+@@ -887,6 +1070,11 @@ static struct phy_driver gpy_drivers[] =
.set_wol = gpy_set_wol,
.get_wol = gpy_get_wol,
.set_loopback = gpy115_loopback,
},
{
.phy_id = PHY_ID_GPY211B,
-@@ -897,6 +1085,11 @@ static struct phy_driver gpy_drivers[] =
+@@ -905,6 +1093,11 @@ static struct phy_driver gpy_drivers[] =
.set_wol = gpy_set_wol,
.get_wol = gpy_get_wol,
.set_loopback = gpy_loopback,
},
{
PHY_ID_MATCH_MODEL(PHY_ID_GPY211C),
-@@ -914,6 +1107,11 @@ static struct phy_driver gpy_drivers[] =
+@@ -922,6 +1115,11 @@ static struct phy_driver gpy_drivers[] =
.set_wol = gpy_set_wol,
.get_wol = gpy_get_wol,
.set_loopback = gpy_loopback,
},
{
.phy_id = PHY_ID_GPY212B,
-@@ -932,6 +1130,11 @@ static struct phy_driver gpy_drivers[] =
+@@ -940,6 +1138,11 @@ static struct phy_driver gpy_drivers[] =
.set_wol = gpy_set_wol,
.get_wol = gpy_get_wol,
.set_loopback = gpy_loopback,
},
{
PHY_ID_MATCH_MODEL(PHY_ID_GPY212C),
-@@ -949,6 +1152,11 @@ static struct phy_driver gpy_drivers[] =
+@@ -957,6 +1160,11 @@ static struct phy_driver gpy_drivers[] =
.set_wol = gpy_set_wol,
.get_wol = gpy_get_wol,
.set_loopback = gpy_loopback,
},
{
.phy_id = PHY_ID_GPY215B,
-@@ -967,6 +1175,11 @@ static struct phy_driver gpy_drivers[] =
+@@ -975,6 +1183,11 @@ static struct phy_driver gpy_drivers[] =
.set_wol = gpy_set_wol,
.get_wol = gpy_get_wol,
.set_loopback = gpy_loopback,
},
{
PHY_ID_MATCH_MODEL(PHY_ID_GPY215C),
-@@ -984,6 +1197,11 @@ static struct phy_driver gpy_drivers[] =
+@@ -992,6 +1205,11 @@ static struct phy_driver gpy_drivers[] =
.set_wol = gpy_set_wol,
.get_wol = gpy_get_wol,
.set_loopback = gpy_loopback,
--- a/drivers/net/phy/mxl-gpy.c
+++ b/drivers/net/phy/mxl-gpy.c
-@@ -876,6 +876,7 @@ static int gpy_led_brightness_set(struct
+@@ -884,6 +884,7 @@ static int gpy_led_brightness_set(struct
}
static const unsigned long supported_triggers = (BIT(TRIGGER_NETDEV_LINK) |
--- a/drivers/net/phy/mxl-gpy.c
+++ b/drivers/net/phy/mxl-gpy.c
-@@ -981,7 +981,7 @@ static int gpy_led_hw_control_set(struct
+@@ -989,7 +989,7 @@ static int gpy_led_hw_control_set(struct
static int gpy_led_polarity_set(struct phy_device *phydev, int index,
unsigned long modes)
{
u32 mode;
if (index >= GPY_MAX_LEDS)
-@@ -990,15 +990,23 @@ static int gpy_led_polarity_set(struct p
+@@ -998,15 +998,23 @@ static int gpy_led_polarity_set(struct p
for_each_set_bit(mode, &modes, __PHY_LED_MODES_NUM) {
switch (mode) {
case PHY_LED_ACTIVE_LOW:
projects / thirdparty / openwrt.git / commitdiff
