if(WITH_OPTIM)
if(BASEARCH_ARM_FOUND)
+ add_definitions(-DARM_GETAUXVAL)
list(APPEND ZLIB_ARCH_SRCS ${ARCHDIR}/armfeature.c ${ARCHDIR}/fill_window_arm.c)
if(WITH_NEON)
list(APPEND ZLIB_ARCH_SRCS ${ARCHDIR}/adler32_neon.c)
add_feature_info(ACLE_CRC 1 "Support CRC hash generation using the ACLE instruction set, using \"${ACLEFLAG}\"")
endif()
elseif(BASEARCH_X86_FOUND)
- add_definitions("-DX86_CPUID")
+ add_definitions(-DX86_CPUID)
list(APPEND ZLIB_ARCH_SRCS ${ARCHDIR}/x86.c)
if(HAVE_SSE42CRC_INLINE_ASM OR HAVE_SSE42CRC_INTRIN)
add_definitions(-DX86_SSE42_CRC_HASH)
int wrap = 1;
static const char my_version[] = PREFIX2(VERSION);
-#ifdef X86_CPUID
+#if defined(X86_CPUID)
x86_check_features();
-#elif defined(__arm__) || defined(__aarch64__) || defined(_M_ARM) || defined(_M_ARM64)
+#elif defined(ARM_GETAUXVAL)
arm_check_features();
#endif
#endif
/* fill_window */
-#ifdef X86_SSE2
+#if defined(X86_SSE2)
extern void fill_window_sse(deflate_state *s);
-#elif defined(__arm__) || defined(__aarch64__) || defined(_M_ARM) || defined(_M_ARM64)
+#elif defined(ARM_GETAUXVAL)
extern void fill_window_arm(deflate_state *s);
#endif
// Initialize default
functable.fill_window=&fill_window_c;
- #ifdef X86_SSE2
+ #if defined(X86_SSE2)
# if !defined(__x86_64__) && !defined(_M_X64) && !defined(X86_NOCHECK_SSE2)
if (x86_cpu_has_sse2)
# endif
functable.fill_window=&fill_window_sse;
- #elif defined(__arm__) || defined(__aarch64__) || defined(_M_ARM) || defined(_M_ARM64)
+ #elif defined(ARM_GETAUXVAL)
functable.fill_window=&fill_window_arm;
#endif
int ret;
struct inflate_state *state;
-#ifdef X86_CPUID
+#if defined(X86_CPUID)
x86_check_features();
-#elif defined(__arm__) || defined(__aarch64__) || defined(_M_ARM) || defined(_M_ARM64)
+#elif defined(ARM_GETAUXVAL)
arm_check_features();
#endif
#if defined(X86_CPUID)
# include "arch/x86/x86.h"
-#elif defined(__aarch64__) || defined(__arm__) || defined(_M_ARM) || defined(_M_ARM64)
+#elif defined(ARM_GETAUXVAL)
# include "arch/arm/arm.h"
#endif