drm/i915: pass dev_priv explicitly to TRANS_VRR_FLIPLINE

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the TRANS_VRR_FLIPLINE register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/fd8b6a7c71ba908a55a7b40dc54a1d4cf920056c.1715183162.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 05cbd6e4fc60eee98c314c66d895a07de3ab639d..e7709b06b92c4167e31a2f0bbbcb42bc94229da9 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -224,7 +224,8 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
                       crtc_state->vrr.vmax - 1);
        intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder),
                       trans_vrr_ctl(crtc_state));
-       intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), crtc_state->vrr.flipline - 1);
+       intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(dev_priv, cpu_transcoder),
+                      crtc_state->vrr.flipline - 1);
 }
 
 void intel_vrr_send_push(const struct intel_crtc_state *crtc_state)
@@ -311,7 +312,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
                                REG_FIELD_GET(VRR_CTL_PIPELINE_FULL_MASK, trans_vrr_ctl);
 
        if (trans_vrr_ctl & VRR_CTL_FLIP_LINE_EN) {
-               crtc_state->vrr.flipline = intel_de_read(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder)) + 1;
+               crtc_state->vrr.flipline = intel_de_read(dev_priv,
+                                                        TRANS_VRR_FLIPLINE(dev_priv, cpu_transcoder)) + 1;
                crtc_state->vrr.vmax = intel_de_read(dev_priv,
                                                     TRANS_VRR_VMAX(dev_priv, cpu_transcoder)) + 1;
                crtc_state->vrr.vmin = intel_de_read(dev_priv,

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a4313f3180e06fe68aa004ac6339578e2acbe3d9..b581e0920c244f29d5e8030fe2ee2fdf99bce341 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1302,7 +1302,7 @@
 #define _TRANS_VRR_FLIPLINE_B          0x61438
 #define _TRANS_VRR_FLIPLINE_C          0x62438
 #define _TRANS_VRR_FLIPLINE_D          0x63438
-#define TRANS_VRR_FLIPLINE(trans)      _MMIO_TRANS2(dev_priv, trans, \
+#define TRANS_VRR_FLIPLINE(dev_priv, trans)    _MMIO_TRANS2(dev_priv, trans, \
                                        _TRANS_VRR_FLIPLINE_A)
 #define   VRR_FLIPLINE_MASK            REG_GENMASK(19, 0)