dt-bindings: clock: dispcc-sm6350: Add MDSS_CORE & MDSS_RSCC resets

Add the indexes for two resets inside the dispcc on SM6350 SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250919-sm6350-mdss-reset-v1-1-48dcac917c73@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/include/dt-bindings/clock/qcom,dispcc-sm6350.h b/include/dt-bindings/clock/qcom,dispcc-sm6350.h
index cb54aae2723e8f20ff3eebde3e15e862be750712..61426a80e620ac795b6f0ccda173654d7e47e59d 100644 (file)
--- a/include/dt-bindings/clock/qcom,dispcc-sm6350.h
+++ b/include/dt-bindings/clock/qcom,dispcc-sm6350.h
@@ -42,6 +42,10 @@
 #define DISP_CC_SLEEP_CLK                      31
 #define DISP_CC_XO_CLK                         32
 
+/* Resets */
+#define DISP_CC_MDSS_CORE_BCR                  0
+#define DISP_CC_MDSS_RSCC_BCR                  1
+
 /* GDSCs */
 #define MDSS_GDSC                              0