Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f75e7d211d31b26457ef226e79deb2cabe5475f3..3d9730364cd1d7560c58672b584455cdbef8f15d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,70 @@
+2024-02-22  Andrew Pinski  <quic_apinski@quicinc.com>
+
+       Backported from master:
+       2024-02-22  Andrew Pinski  <quic_apinski@quicinc.com>
+
+       PR tree-optimization/109804
+       * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
+       DEMANGLE_COMPONENT_UNNAMED_TYPE.
+
+2024-02-22  Xi Ruoyao  <xry111@xry111.site>
+
+       Backported from master:
+       2023-10-31  Xi Ruoyao  <xry111@xry111.site>
+
+       PR target/112299
+       * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
+       if not defined yet.
+
+2024-02-22  Xi Ruoyao  <xry111@xry111.site>
+
+       Backported from master:
+       2023-11-14  Xi Ruoyao  <xry111@xry111.site>
+
+       PR target/112330
+       * config/loongarch/genopts/loongarch.opt.in: Add
+       -m[no]-pass-relax-to-as.  Change the default of -m[no]-relax to
+       account conditional branch relaxation support status.
+       * config/loongarch/loongarch.opt: Regenerate.
+       * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
+       the assembler supports conditional branch relaxation.
+       * configure: Regenerate.
+       * config.in: Regenerate.  Note that there are some unrelated
+       changes introduced by r14-5424 (which does not contain a
+       config.in regeneration).
+       * config/loongarch/loongarch-opts.h
+       (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
+       * config/loongarch/loongarch.h (ASM_MRELAX_DEFAULT): Define.
+       (ASM_MRELAX_SPEC): Define.
+       (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
+       * doc/invoke.texi: Document -m[no-]relax and
+       -m[no-]pass-mrelax-to-as for LoongArch.
+
+2024-02-22  Lulu Cheng  <chenglulu@loongson.cn>
+
+       Backported from master:
+       2023-09-20  Lulu Cheng  <chenglulu@loongson.cn>
+
+       * config.in: Regenerate.
+       * config/loongarch/genopts/loongarch.opt.in: Add compilation option
+       mrelax. And set the initial value of explicit-relocs according to the
+       detection status.
+       * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
+       --no-relax option to the linker.
+       * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
+       * config/loongarch/loongarch.opt: Regenerate.
+       * configure: Regenerate.
+       * configure.ac: Add detection of support for binutils relax function.
+
+2024-02-22  Lulu Cheng  <chenglulu@loongson.cn>
+
+       Backported from master:
+       2023-10-17  Lulu Cheng  <chenglulu@loongson.cn>
+                   Chenghua Xu  <xuchenghua@loongson.cn>
+
+       * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
+       Delete.
+
 2024-02-20  Georg-Johann Lay  <avr@gjlay.de>
 
        Backported from master:

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 768ab7eee3e89dfd0d7b45f93a22f4029caec3f6..bb29f6e6b704291e895043addf39fd593bcca37d 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240222
+20240223

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8e6cfd87ee127c42523fae573680f72ab8394a8b..472fd14ea0fe138126da9ec3fe069f9d9f24fec3 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,24 @@
+2024-02-23  Marek Polacek  <polacek@redhat.com>
+
+       Backported from master:
+       2024-02-22  Marek Polacek  <polacek@redhat.com>
+
+       * g++.dg/warn/Wmismatched-new-delete-8.C: Use __SIZE_TYPE__.
+
+2024-02-22  Andrew Pinski  <quic_apinski@quicinc.com>
+
+       Backported from master:
+       2024-02-22  Andrew Pinski  <quic_apinski@quicinc.com>
+
+       PR tree-optimization/109804
+       * g++.dg/warn/Wmismatched-new-delete-8.C: New test.
+
+2024-02-22  Lewis Hyatt  <lhyatt@gmail.com>
+
+       PR preprocessor/105608
+       * g++.dg/pch/line-map-3.C: Removed.
+       * g++.dg/pch/line-map-3.Hs: Removed.
+
 2024-02-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
        Backported from master: