]> git.ipfire.org Git - thirdparty/valgrind.git/commitdiff
Introduce HInstrSB into VEX backend headers.
authorIvo Raisr <ivosh@ivosh.net>
Tue, 8 Aug 2017 05:03:04 +0000 (07:03 +0200)
committerIvo Raisr <ivosh@ivosh.net>
Mon, 28 Aug 2017 21:23:15 +0000 (23:23 +0200)
VEX/priv/host_amd64_defs.h
VEX/priv/host_arm64_defs.h
VEX/priv/host_arm_defs.h
VEX/priv/host_mips_defs.h
VEX/priv/host_ppc_defs.h
VEX/priv/host_s390_defs.h
VEX/priv/host_x86_defs.c
VEX/priv/host_x86_defs.h

index 8a3eea8817d504fd65837b61bf02aca762e23c38..57ef1698dcf393bfa76096792e81d70ac1f367a0 100644 (file)
@@ -806,7 +806,7 @@ extern AMD64Instr* directReload_AMD64 ( AMD64Instr* i,
 
 extern const RRegUniverse* getRRegUniverse_AMD64 ( void );
 
-extern HInstrArray* iselSB_AMD64           ( const IRSB*, 
+extern HInstrSB* iselSB_AMD64              ( const IRSB*,
                                              VexArch,
                                              const VexArchInfo*,
                                              const VexAbiInfo*,
index e7da4f90fb7ae6bf791a8ca8f09de3094ae13a15..840e0aabc99689bf52a98259f8367b31dbf7dd92 100644 (file)
@@ -1011,7 +1011,7 @@ extern ARM64Instr* genMove_ARM64(HReg from, HReg to, Bool);
 
 extern const RRegUniverse* getRRegUniverse_ARM64 ( void );
 
-extern HInstrArray* iselSB_ARM64 ( const IRSB*, 
+extern HInstrSB* iselSB_ARM64    ( const IRSB*,
                                    VexArch,
                                    const VexArchInfo*,
                                    const VexAbiInfo*,
index 56c4ec5055495e0f6652f729661b7cdfca5eff30..ec6358ee15badc95607f6bcfdc48e26b9bf16e80 100644 (file)
@@ -1074,7 +1074,7 @@ extern ARMInstr* genMove_ARM(HReg from, HReg to, Bool);
 
 extern const RRegUniverse* getRRegUniverse_ARM ( void );
 
-extern HInstrArray* iselSB_ARM   ( const IRSB*, 
+extern HInstrSB* iselSB_ARM      ( const IRSB*,
                                    VexArch,
                                    const VexArchInfo*,
                                    const VexAbiInfo*,
index a4c0e789cd9c0971752228566f60776495172e3d..45fff16fd0306b67de9fbe572be939c907725084 100644 (file)
@@ -704,7 +704,7 @@ extern MIPSInstr* genMove_MIPS(HReg from, HReg to, Bool mode64);
 
 extern const RRegUniverse* getRRegUniverse_MIPS ( Bool mode64 );
 
-extern HInstrArray *iselSB_MIPS          ( const IRSB*,
+extern HInstrSB *iselSB_MIPS             ( const IRSB*,
                                            VexArch,
                                            const VexArchInfo*,
                                            const VexAbiInfo*,
index 6b7fcc8cb3c3fbac949cd6952942efea9155fde0..5cc9a85e920032942a2b7be50299c1b3bcd9e38a 100644 (file)
@@ -1219,7 +1219,7 @@ extern PPCInstr* genMove_PPC(HReg from, HReg to, Bool mode64);
 
 extern const RRegUniverse* getRRegUniverse_PPC ( Bool mode64 );
 
-extern HInstrArray* iselSB_PPC           ( const IRSB*,
+extern HInstrSB* iselSB_PPC              ( const IRSB*,
                                            VexArch,
                                            const VexArchInfo*,
                                            const VexAbiInfo*,
index 937829cd8fe1786bc9c6560bd064ee8a9a6dffce..41b6ecd67234483027c704f354f795652e0bea90 100644 (file)
@@ -750,7 +750,7 @@ const RRegUniverse *getRRegUniverse_S390( void );
 void  genSpill_S390        ( HInstr **, HInstr **, HReg , Int , Bool );
 void  genReload_S390       ( HInstr **, HInstr **, HReg , Int , Bool );
 extern s390_insn* genMove_S390(HReg from, HReg to, Bool mode64);
-HInstrArray *iselSB_S390   ( const IRSB *, VexArch, const VexArchInfo *,
+HInstrSB *iselSB_S390      ( const IRSB *, VexArch, const VexArchInfo *,
                              const VexAbiInfo *, Int, Int, Bool, Bool, Addr);
 
 /* Return the number of bytes of code needed for an event check */
index 2e5c0446696447fb8a92547173d9ae15b1c6fe81..f4ff04917c380e1b7bf11f17f4fe3283bae35181 100644 (file)
@@ -927,6 +927,13 @@ X86Instr* X86Instr_ProfInc ( void ) {
    i->tag      = Xin_ProfInc;
    return i;
 }
+X86Instr* X86Instr_IfThenElse(HInstrIfThenElse* hite)
+{
+   X86Instr* i            = LibVEX_Alloc_inline(sizeof(X86Instr));
+   i->tag                 = Xin_IfThenElse;
+   i->Xin.IfThenElse.hite = hite;
+   return i;
+}
 
 void ppX86Instr ( const X86Instr* i, Bool mode64 ) {
    vassert(mode64 == False);
@@ -1217,11 +1224,20 @@ void ppX86Instr ( const X86Instr* i, Bool mode64 ) {
          vex_printf("(profInc) addl $1,NotKnownYet; "
                     "adcl $0,NotKnownYet+4");
          return;
+      case Xin_IfThenElse:
+         vex_printf("if (!%s) then {...",
+                    showX86CondCode(i->Xin.IfThenElse.hite->ccOOL));
+         return;
       default:
          vpanic("ppX86Instr");
    }
 }
 
+void ppX86CondCode(X86CondCode condCode)
+{
+   vex_printf("%s", showX86CondCode(condCode));
+}
+
 /* --------- Helpers for register allocation. --------- */
 
 void getRegUsage_X86Instr (HRegUsage* u, const X86Instr* i, Bool mode64)
@@ -1702,6 +1718,13 @@ Bool isMove_X86Instr ( const X86Instr* i, HReg* src, HReg* dst )
    return False;
 }
 
+extern HInstrIfThenElse* isIfThenElse_X86Instr(X86Instr* i)
+{
+   if (UNLIKELY(i->tag == Xin_IfThenElse)) {
+      return i->Xin.IfThenElse.hite;
+   }
+   return NULL;
+}
 
 /* Generate x86 spill/reload instructions under the direction of the
    register allocator.  Note it's critical these don't write the
index 614b7512c64309ba302b5cfae8c806613ed7b620..d32ff9862df715c1270ff56bcb601e066974591d 100644 (file)
@@ -388,7 +388,8 @@ typedef
       Xin_SseCMov,   /* SSE conditional move */
       Xin_SseShuf,   /* SSE2 shuffle (pshufd) */
       Xin_EvCheck,   /* Event check */
-      Xin_ProfInc    /* 64-bit profile counter increment */
+      Xin_ProfInc,   /* 64-bit profile counter increment */
+      Xin_IfThenElse /* HInstrIfThenElse */
    }
    X86InstrTag;
 
@@ -652,6 +653,9 @@ typedef
                installed later, post-translation, by patching it in,
                as it is not known at translation time. */
          } ProfInc;
+         struct {
+            HInstrIfThenElse* hite;
+         } IfThenElse;
 
       } Xin;
    }
@@ -708,15 +712,18 @@ extern X86Instr* X86Instr_SseShuf   ( Int order, HReg src, HReg dst );
 extern X86Instr* X86Instr_EvCheck   ( X86AMode* amCounter,
                                       X86AMode* amFailAddr );
 extern X86Instr* X86Instr_ProfInc   ( void );
+extern X86Instr* X86Instr_IfThenElse(HInstrIfThenElse*);
 
 
 extern void ppX86Instr ( const X86Instr*, Bool );
+extern void ppX86CondCode(X86CondCode);
 
 /* Some functions that insulate the register allocator from details
    of the underlying instruction set. */
 extern void         getRegUsage_X86Instr ( HRegUsage*, const X86Instr*, Bool );
 extern void         mapRegs_X86Instr     ( HRegRemap*, X86Instr*, Bool );
 extern Bool         isMove_X86Instr      ( const X86Instr*, HReg*, HReg* );
+extern HInstrIfThenElse* isIfThenElse_X86Instr(X86Instr*);
 extern Int          emit_X86Instr   ( /*MB_MOD*/Bool* is_profInc,
                                       UChar* buf, Int nbuf, const X86Instr* i, 
                                       Bool mode64,
@@ -735,7 +742,7 @@ extern X86Instr* directReload_X86 ( X86Instr* i, HReg vreg, Short spill_off );
 
 extern const RRegUniverse* getRRegUniverse_X86 ( void );
 
-extern HInstrArray* iselSB_X86           ( const IRSB*,
+extern HInstrSB* iselSB_X86              ( const IRSB*,
                                            VexArch,
                                            const VexArchInfo*,
                                            const VexAbiInfo*,