6.1-stable patches

added patches:
	x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch

diff --git a/queue-6.1/series b/queue-6.1/series
index b4c0454293051455be5faff5c1d60f9f173eeb35..35f06038f8444f66605e444f1cad21fcc99b7e5c 100644 (file)
--- a/queue-6.1/series
+++ b/queue-6.1/series
@@ -385,3 +385,4 @@ loongarch-fix-potential-ade-in-loongson_gpu_fixup_dma_hang.patch
 loongarch-use-per-root-bridge-pcih-flag-to-skip-mem-resource-fixup.patch
 f2fs-compress-change-the-first-parameter-of-page_arr.patch
 f2fs-compress-fix-uaf-of-f2fs_inode_info-in-f2fs_fre.patch
+x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch

diff --git a/queue-6.1/x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch b/queue-6.1/x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch
new file mode 100644 (file)
index 0000000..385b88f
--- /dev/null
+++ b/queue-6.1/x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch
@@ -0,0 +1,57 @@
+From 1ea83dfe1569d2c5699e668d70a5fcbb174aa744 Mon Sep 17 00:00:00 2001
+From: Prathyushi Nangia <prathyushi.nangia@amd.com>
+Date: Tue, 9 Dec 2025 10:01:33 -0600
+Subject: x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache
+
+From: Prathyushi Nangia <prathyushi.nangia@amd.com>
+
+commit c21b90f77687075115d989e53a8ec5e2bb427ab1 upstream.
+
+Make sure resources are not improperly shared in the op cache and
+cause instruction corruption this way.
+
+Signed-off-by: Prathyushi Nangia <prathyushi.nangia@amd.com>
+Co-developed-by: Borislav Petkov (AMD) <bp@alien8.de>
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/include/asm/msr-index.h       |    1 +
+ arch/x86/kernel/cpu/amd.c              |    3 +++
+ tools/arch/x86/include/asm/msr-index.h |    3 +++
+ 3 files changed, 7 insertions(+)
+
+--- a/arch/x86/include/asm/msr-index.h
++++ b/arch/x86/include/asm/msr-index.h
+@@ -672,6 +672,7 @@
+ /* Zen4 */
+ #define MSR_ZEN4_BP_CFG                       0xc001102e
+ #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
++#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT   33
+ 
+ /* Zen 2 */
+ #define MSR_ZEN2_SPECTRAL_CHICKEN     0xc00110e3
+--- a/arch/x86/kernel/cpu/amd.c
++++ b/arch/x86/kernel/cpu/amd.c
+@@ -1146,6 +1146,9 @@ static void init_amd_zen2(struct cpuinfo
+ {
+       init_amd_zen_common();
+       init_spectral_chicken(c);
++
++      if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
++              msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
+ }
+ 
+ static void init_amd_zen3(struct cpuinfo_x86 *c)
+--- a/tools/arch/x86/include/asm/msr-index.h
++++ b/tools/arch/x86/include/asm/msr-index.h
+@@ -598,6 +598,9 @@
+ /* AMD Last Branch Record MSRs */
+ #define MSR_AMD64_LBR_SELECT                  0xc000010e
+ 
++#define MSR_ZEN4_BP_CFG                       0xc001102e
++#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT   33
++
+ /* Fam 17h MSRs */
+ #define MSR_F17H_IRPERF                       0xc00000e9
+