board: tqma6: update RAM timing to verified settings Rev.0300D

Input from TQ-Systems hardware qualification team.
Fixes performance issues if ethernet and display are used simultaneously.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>

diff --git a/board/tq/tqma6/tqma6dl.cfg b/board/tq/tqma6/tqma6dl.cfg
index f7289adb40ab9d2bb792582c39f11dfa7e94ebb0..17a3d0105178beda8b9a6bb961fe9e39ee9b55e9 100644 (file)
--- a/board/tq/tqma6/tqma6dl.cfg
+++ b/board/tq/tqma6/tqma6dl.cfg
@@ -29,7 +29,7 @@ BOOT_FROM      spi
 #include "asm/arch/iomux.h"
 #include "asm/arch/crm_regs.h"
 
-/* TQMa6DL DDR config Rev. 0100E */
+/* TQMa6DL DDR config Rev. 0300D */
 /* IOMUX configuration */
 DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
 DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
@@ -38,7 +38,7 @@ DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030
 DATA 4, MX6_IOM_DRAM_CAS, 0x00008030
 DATA 4, MX6_IOM_DRAM_RAS, 0x00008030
 DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
-DATA 4, MX6_IOM_DRAM_RESET, 0x000C3030
+DATA 4, MX6_IOM_DRAM_RESET, 0x00000030
 DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
 DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000
 DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
@@ -104,7 +104,7 @@ DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
 DATA 4, MX6_MMDC_P0_MDCFG0, 0x3F435333
 DATA 4, MX6_MMDC_P0_MDCFG1, 0xB68E8B63
 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
+DATA 4, MX6_MMDC_P0_MDMISC, 0x00011740
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
 DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
 DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
@@ -113,7 +113,7 @@ DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00408032
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x05208030
+DATA 4, MX6_MMDC_P0_MDSCR, 0x15208030
 DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
 DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
 DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022222

diff --git a/board/tq/tqma6/tqma6q.cfg b/board/tq/tqma6/tqma6q.cfg
index ad862535c502dbb366564e5a0f321c5973ec5bb7..673482b543c191e5d1da249550855c2bfdcbefa8 100644 (file)
--- a/board/tq/tqma6/tqma6q.cfg
+++ b/board/tq/tqma6/tqma6q.cfg
@@ -29,7 +29,7 @@ BOOT_FROM      spi
 #include "asm/arch/iomux.h"
 #include "asm/arch/crm_regs.h"
 
-/* TQMa6Q/D DDR config Rev. 0100B */
+/* TQMa6Q/D DDR config Rev. 0300D */
 /* IOMUX configuration */
 DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
 DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
@@ -38,7 +38,7 @@ DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030
 DATA 4, MX6_IOM_DRAM_CAS, 0x00008030
 DATA 4, MX6_IOM_DRAM_RAS, 0x00008030
 DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
-DATA 4, MX6_IOM_DRAM_RESET, 0x00003030
+DATA 4, MX6_IOM_DRAM_RESET, 0x00000030
 DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
 DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000
 DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
@@ -75,18 +75,18 @@ DATA 4, MX6_IOM_DRAM_DQM7, 0x00000030
 /* memory interface calibration values */
 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
 DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001B0013
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0018001B
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001B0016
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012001C
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43400350
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x023E032C
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43400348
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03300304
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x3C323436
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x38383242
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3E3C4440
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4236483E
+DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00180016
+DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F0018
+DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00130023
+DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00040018
+DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43500364
+DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x034C0344
+DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43580364
+DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x033C031C
+DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x3C323438
+DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x383A3040
+DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3A3E4440
+DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4834483A
 DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
 DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
 DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
@@ -104,18 +104,19 @@ DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
 DATA 4, MX6_MMDC_P0_MDCFG0, 0x545A79B4
 DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64
 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
+DATA 4, MX6_MMDC_P0_MDMISC, 0x00011740
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
 DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
 DATA 4, MX6_MMDC_P0_MDOR, 0x005A1023
 DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
 DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00088032
+
+DATA 4, MX6_MMDC_P0_MDSCR, 0x00488032
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x09308030
+DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030
 DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
+DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
 DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022222
 DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022222
 DATA 4, MX6_MMDC_P0_MDPDC, 0x00025536

diff --git a/board/tq/tqma6/tqma6s.cfg b/board/tq/tqma6/tqma6s.cfg
index e50fe3f57d7fd4c3703a4480bd0f0ecd47890f9b..a5057689d6483444b34a298f928d52c42e5fbaf6 100644 (file)
--- a/board/tq/tqma6/tqma6s.cfg
+++ b/board/tq/tqma6/tqma6s.cfg
@@ -29,7 +29,7 @@ BOOT_FROM      spi
 #include "asm/arch/iomux.h"
 #include "asm/arch/crm_regs.h"
 
-/* TQMa6S DDR config Rev. 0100B */
+/* TQMa6S DDR config Rev. 0300D */
 /* IOMUX configuration */
 DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
 DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
@@ -38,7 +38,7 @@ DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030
 DATA 4, MX6_IOM_DRAM_CAS, 0x00008030
 DATA 4, MX6_IOM_DRAM_RAS, 0x00008030
 DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
-DATA 4, MX6_IOM_DRAM_RESET, 0x000C3030
+DATA 4, MX6_IOM_DRAM_RESET, 0x00000030
 DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
 DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000
 DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
@@ -75,17 +75,17 @@ DATA 4, MX6_IOM_DRAM_DQM7, 0x00000000
 /* memory interface calibration values */
 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
 DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1380000
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0014000E
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00120014
+DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x004C004A
+DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x003F0048
 DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00000000
 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00000000
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x0240023C
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x0228022C
+DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42440240
+DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x022C022C
 DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x00000000
 DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x00000000
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4A4A4E4A
+DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x484A504C
 DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x00000000
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x36362A32
+DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x34322832
 DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x00000000
 DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
 DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
@@ -104,18 +104,19 @@ DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
 DATA 4, MX6_MMDC_P0_MDCFG0, 0x3F435333
 DATA 4, MX6_MMDC_P0_MDCFG1, 0xB68E8B63
 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
+DATA 4, MX6_MMDC_P0_MDMISC, 0x00011740
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
 DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
 DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
 DATA 4, MX6_MMDC_P0_MDASP, 0x00000017
 DATA 4, MX6_MMDC_P0_MDCTL, 0x83190000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008032
+
+DATA 4, MX6_MMDC_P0_MDSCR, 0x00408032
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
 DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x05208030
+DATA 4, MX6_MMDC_P0_MDSCR, 0x15208030
 DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
+DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
 DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022222
 DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000
 DATA 4, MX6_MMDC_P0_MDPDC, 0x0002552D