]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: imx8mn-beacon: Fix HS400 USDHC clock speed
authorAdam Ford <aford173@gmail.com>
Fri, 20 Jun 2025 21:34:46 +0000 (16:34 -0500)
committerShawn Guo <shawnguo@kernel.org>
Fri, 11 Jul 2025 08:34:31 +0000 (16:34 +0800)
The reference manual for the i.MX8MN states the clock rate in
MMC mode is 1/2 of the input clock, therefore to properly run
at HS400 rates, the input clock must be 400MHz to operate at
200MHz.  Currently the clock is set to 200MHz which is half the
rate it should be, so the throughput is half of what it should be
for HS400 operation.

Fixes: 36ca3c8ccb53 ("arm64: dts: imx: Add Beacon i.MX8M Nano development kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi

index 67a99383a63247f5373efc8cd20da75ef55516e1..917b7d0007a7a3e29e71222334c33544d208a5e4 100644 (file)
        pinctrl-0 = <&pinctrl_usdhc3>;
        pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
        pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       assigned-clocks = <&clk IMX8MN_CLK_USDHC3>;
+       assigned-clock-rates = <400000000>;
        bus-width = <8>;
        non-removable;
        status = "okay";